Power amplifier with a power transistor and an electrostatic discharge protection circuit on separate substrates

An amplifier comprising:

• a first semiconductor die that includes a III-V semiconductor substrate, a first radio frequency (RF) signal input terminal, a first RF signal output terminal, and a first transistor, wherein the first transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal;
• a substrate that is distinct from the first semiconductor die, wherein the substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and a first electrostatic discharge (ESD) protection circuit;
• a first connection electrically coupled between the first ESD protection circuit and the control terminal of the first transistor;
• and
• wherein:
• the substrate further includes a first bias voltage control circuit, coupled to the first ESD protection circuit, wherein the first bias voltage control circuit includes a bias input terminal configured to be coupled to an external bias voltage source, and a bias output terminal configured to be coupled to the control terminal of the first transistor, wherein during operation, the bias output terminal conveys a DC bias voltage to the control terminal of the first transistor through the first connection.

An amplifier comprising:

• a first semiconductor die that includes a first radio frequency (RF) signal input terminal, a first RF signal output terminal, a first transistor, and an electrostatic discharge (ESD) protection circuit, wherein the first transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal;
• a second semiconductor die that includes a second RF signal input terminal, a second RF signal output terminal, and a gallium nitride (GaN) transistor, wherein the GaN transistor has a control terminal electrically coupled to the second RF signal input terminal, and a current-carrying terminal electrically coupled to the second RF signal output terminal;
• and
• a first connection direct current (DC) coupled between the ESD protection circuit and the control terminal of the GaN transistor.