FET with wrap-around silicide and fabrication methods thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsPei-Hsun Wang, Chih-Chao Chou, Shih-Cheng Chen, Jung-Hung Chang, Jui-Chien Huang, Chun-Hsiung Lin, Chih-Hao Wang
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Abstract
The present disclosure provides a semiconductor device that includes a semiconductor fin disposed over a substrate, an isolation structure at least partially surrounding the fin, an epitaxial source/drain (S/D) feature disposed over the semiconductor fin, where an extended portion of the epitaxial S/D feature extends over the isolation structure, and a silicide layer disposed on the epitaxial S/D feature, where the silicide layer covers top, bottom, sidewall, front, and back surfaces of the extended portion of the S/D feature.
Claims20
A semiconductor device, comprising:
- a semiconductor fin disposed over a substrate;
- an isolation structure at least partially surrounding the semiconductor fin;
- a source/drain (S/D) feature disposed over the semiconductor fin, wherein an extended portion of the S/D feature extends over the isolation structure;
- and
- a silicide layer disposed over the S/D feature, wherein the silicide layer fully wraps around the extended portion of the S/D feature when viewed in a cross-section cut vertically along a length of the semiconductor fin.
A semiconductor device, comprising:
- a semiconductor fin disposed in an isolation feature over a substrate;
- a dielectric fin disposed over the isolation feature and adjacent to the semiconductor fin;
- an epitaxial source/drain (S/D) feature wrapping around the semiconductor fin, wherein the epitaxial S/D feature is disposed in a concave of an interlayer dielectric layer;
- a silicide layer wrapping around the epitaxial S/D feature;
- and
- a spacer layer wrapping around the silicide layer, wherein a portion of the spacer layer is disposed between the isolation feature and the silicide layer.
A semiconductor device, comprising:
- a fin including a stack of semiconductor layers disposed over a substrate;
- an epitaxial source/drain (S/D) feature wrapping around the fin;
- a gate structure disposed over the substrate, wherein the gate structure includes a top portion disposed over the fin and a bottom portion interleaved with the stack of semiconductor layers;
- a silicide layer wrapping around the epitaxial S/D feature, wherein a side wall of the silicide layer covers a sidewall of the epitaxial S/D feature facing the gate structure;
- and
- an S/D contact disposed adjacent to the gate structure, wherein the S/D contact contacts the silicide layer.
Dependencies are inferred from the claim text.