Semiconductor device, method of manufacturing the same and electronic device including the device
AssigneeInstitute of Microelectronics, Chinese Academy of Sciences
InventorHuilong Zhu
Life of this patent
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Abstract
There are provided a semiconductor device, a method of manufacturing the same, and an electronic device including the device. According to an embodiment, the semiconductor device may include a substrate, and a first device and a second device formed on the substrate. Each of the first device and the second device includes a first source/drain layer, a channel layer and a second source/drain layer stacked on the substrate in sequence, and also a gate stack surrounding a periphery of the channel layer. The channel layer of the first device and the channel layer of the second device are substantially co-planar.
Claims26
A semiconductor device, comprising:
- a substrate;
- a first source/drain layer, a channel layer and a second source/drain layer stacked on the substrate in sequence, wherein the channel layer has an etching selectivity with respect to the first source/drain layer and/or the second source/drain layer;
- and
- a gate stack surrounding a periphery of the channel layer,
- wherein the channel layer has its periphery recessed inwards with respect to peripheries of the first source/drain layer and the second source/drain layer, and the gate stack is embedded into a recess which is formed by the periphery of the channel layer with respect to the peripheries of the first source/drain layer and the second source/drain layer and thus self-aligned to the channel layer.
A method of manufacturing a semiconductor device, comprising:
- epitaxially growing a first source/drain layer on a substrate;
- forming a channel layer on the first source/drain layer;
- epitaxially growing a second source/drain layer on the channel layer;
- defining an active region of the semiconductor device from the first source/drain layer, the channel layer and the second source/drain layer;
- and
- forming a gate stack surrounding a periphery of the channel layer,
- wherein the channel layer has its periphery recessed inwards with respect to peripheries of the first source/drain layer and the second source/drain layer, and the gate stack is embedded into a recess which is formed by the periphery of the channel layer with respect to the peripheries of the first source/drain layer and the second source/drain layer and thus self-aligned to the channel layer.
Dependencies are inferred from the claim text.