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US 11,695,073 B2Granted
Memory array gate structures
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChun-Chieh Lu, Sai-Hooi Yeong, Bo-Feng Young, Yu-Ming Lin, Chih-Yu Chang
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Abstract
A memory cell includes a thin film transistor over a semiconductor substrate. The thin film transistor comprising: a ferroelectric (FE) material contacting a word line, the FE material being a hafnium-comprising compound, and the hafnium-comprising compound comprising a rare earth metal; and an oxide semiconductor (OS) layer contacting a source line and a bit line, wherein the FE material is disposed between the OS layer and the word line.
Claims20
A memory cell comprising:
- a transistor over a semiconductor substrate, the transistor comprising:
- a ferroelectric (FE) material directly contacting a word line, the FE material being a hafnium-comprising compound, and the hafnium-comprising compound comprising a rare earth metal, wherein the word line is one of a plurality of vertically stacked word lines, and wherein the FE material directly contacts a respective sidewall of each of the plurality of vertically stacked word lines;
- and
- an oxide semiconductor (OS) layer contacting a source line and a bit line, wherein the FE material is disposed between the OS layer and the word line, and wherein the FE material further directly contacts the OS layer.
1 more element
A device comprising:
- a semiconductor substrate;
- a first memory cell over the semiconductor substrate, the first memory cell comprising a first thin film transistor, wherein the first thin film transistor comprises:
- a first portion of a ferroelectric material, the first portion of the ferroelectric material being on a sidewall of a first word line, and the ferroelectric material comprising a rare earth metal;
- and
- a first channel region on a sidewall of the ferroelectric material, the first channel region comprising an oxide semiconductor material;
- and
- a second memory cell over the first memory cell, wherein the second memory cell comprises a second thin film transistor, the second thin film transistor comprising:
- a second portion of the ferroelectric material, the second portion of the ferroelectric material contacting a second word line over the first word line, the second word line and the first word line being separated by a dielectric layer, and the ferroelectric material extending continuously from a level of a top surface of the second word line to a level of a bottom surface of the first word line;
- and
- a second channel region, the second channel region comprising the oxide semiconductor material.
7 more elements
A device comprising:
- a first conductive line;
- a first dielectric material over the first conductive line;
- a second conductive line over the first dielectric material;
- a ferroelectric (FE) material along sidewalls of the first conductive line, the first dielectric material, and the second conductive line, wherein the FE material comprises a hafnium-comprising compound, and wherein the hafnium-comprising compound further comprises a rare earth metal;
- a first oxide semiconductor (OS) material along a sidewall of the FE material, wherein the FE material separates the first OS material from the first conductive line and the second conductive line;
- a second oxide semiconductor (OS) material along a sidewall of the FE material, wherein the FE material separates the second OS material from the first conductive line and the second conductive line;
- and
- a third dielectric material separating the first OS material from the second OS material.
5 more elements
Dependencies are inferred from the claim text.