Power switch arrangement

A method of operating a power switch, the method comprising:

• operating sensor transistors with respect to transistors arranged as a power switch, with the sensor transistors having control nodes connected in parallel, separate from the transistors arranged as a power switch, the sensor transistors having a common transistor region that is shared with a transistor region of the transistors of the power switch, with a ratio of the transistors arranged as the power switch to the sensor transistors being greater than ten;
• generating a control signal to the control nodes of the sensor transistors;
• measuring a voltage between two transistor regions of the sensor transistors in response to the control signal;
• calculating, in control and calibration circuitry, a junction temperature of the sensor transistors from the measured voltage;
• and
• controlling, in the control and calibration circuitry, the on and off times of the sensor transistors to turn the sensor transistors on after turning on the transistors arranged as the power switch and to turn the sensor transistors off before turning off the transistors arranged as the power switch.

A method of constructing a power device, the method comprising:

• forming an array of transistors;
• arranging a first number of transistors of the array as a power switch, with the first number of transistors of the array arranged as a power switch having control nodes connected in parallel to receive a common control signal to the first number of transistors;
• and
• arranging a second number of transistors of the array as sensor transistors to measure one or more parameters of the power switch including a junction temperature of the power switch, with the sensor transistors having sensor control nodes connected in parallel to receive a common sensor control signal to the sensor transistors with the sensor control nodes separate from the control nodes of the transistors arranged as the power switch;
• forming the sensor transistors having a common transistor region that is shared with a transistor region of the transistors of the power switch, with a ratio of the first number to the second number being greater than ten;
• and
• forming control and calibration circuitry configured to calculate the junction temperature of the sensor transistors using a known value of an internal gate resistance of the sensor transistors at a specified temperature and a known temperature coefficient for material of the gates of the sensor transistors.