Gate stacks for FinFET transistors
AssigneeIntel Corporation
InventorsAshish Penumatcha, Seung Hoon Sung, Scott Clendenning, Uygar Avci, Ian A. Young, Jack T. Kavalieros
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AssigneeIntel Corporation
InventorsAshish Penumatcha, Seung Hoon Sung, Scott Clendenning, Uygar Avci, Ian A. Young, Jack T. Kavalieros
Estimating the term…
Embodiments herein describe techniques for a semiconductor device including a substrate and a FinFET transistor on the substrate. The FinFET transistor includes a fin structure having a channel area, a source area, and a drain area. The FinFET transistor further includes a gate dielectric area between spacers above the channel area of the fin structure and below a top surface of the spacers; spacers above the fin structure and around the gate dielectric area; and a metal gate conformally covering and in direct contact with sidewalls of the spacers. The gate dielectric area has a curved surface. The metal gate is in direct contact with the curved surface of the gate dielectric area. Other embodiments may be described and/or claimed.
A semiconductor device, comprising:
A computing device, comprising:
Dependencies are inferred from the claim text.