Semiconductor device with reduced contact resistance
AssigneeSamsung Electronics Co., Ltd.
InventorsSahwan Hong, Hanki Lee, Jeongmin Lee
Life of this patent
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Abstract
A semiconductor device includes an active region on a substrate, a gate structure on the substrate and intersecting the active region, a source/drain region on the active region on both sides of the gate structure and including silicon (Si), and a contact structure on the source/drain region. The source/drain region includes a shallow doping region doped with germanium (Ge) and is in an upper region including an upper surface of the source/drain region. A concentration of germanium (Ge) in the shallow doping region gradually decreases from the upper surface of the source/drain region toward an upper surface of the substrate in a direction that is perpendicular to an upper surface of the substrate.
Claims20
A semiconductor device comprising:
- an active region on a substrate;
- a gate structure on the substrate, wherein the gate structure intersects the active region;
- a source/drain region on the active region and on a side of the gate structure and comprising silicon (Si);
- and
- a contact structure on the source/drain region,
- wherein the source/drain region comprises a shallow doping region that is doped with germanium (Ge) and is in an upper region including an uppermost surface of the source/drain region,
- wherein a concentration of germanium (Ge) in the shallow doping region gradually decreases from the upper surface of the source/drain region toward an upper surface of the substrate in a direction that is perpendicular to the upper surface of the substrate, and
- wherein an atomic percentage of germanium (Ge) adjacent the upper surface of the source/drain region is in a range of about 95 at % to about 100 at %.
A semiconductor device comprising:
- an active region on a substrate, wherein the active region extends in a first direction;
- a gate structure on the substrate, intersecting the active region, and extending in a second direction;
- and
- a source/drain region on the active region and on a side of the gate structure and comprising silicon (Si),
- wherein the source/drain region comprises a shallow doping region doped with germanium (Ge) and in an upper region that includes an upper surface of the source/drain region, and an epitaxial region below the shallow doping region,
- wherein a thickness of the epitaxial region in a third direction that is perpendicular to an upper surface of the substrate is greater than a thickness of the shallow doping region in the third direction, and
- wherein an atomic percentage of germanium (Ge) with respect to silicon (Si) adjacent the upper surface of the source/drain region is in a range of about 95 at % to about 100 at %.
A semiconductor device comprising:
- an active region on a substrate;
- a gate structure on the substrate, wherein the gate structure intersects the active region;
- and
- a source/drain region on the active region on at least one side of the gate structure,
- wherein the source/drain region comprises a first region having a depth of about 2 nm to about 6 nm from an upper surface of the source/drain region,
- wherein, in the first region, a concentration of germanium (Ge) in the source/drain region gradually decreases as a depth of the source/drain region from the upper surface of the source/drain region increases, and
- wherein an atomic percentage of germanium (Ge) adjacent the upper surface of the source/drain region is in a range of about 95 at % to about 100 at %.
Dependencies are inferred from the claim text.