Semiconductor memory device

A semiconductor memory device comprising:

• a wiring board;
• a chip stack including a plurality of memory chips, the plurality of memory chips being stacked above the wiring board;
• and
• an insulation resin layer covering the chip stack,
• at least one chip selected from the group consisting of the plurality of memory chips comprising a first region including a memory cell array and a second region including a peripheral circuit,
• the second region comprising a semiconductor substrate having a first surface and a second surface, and
• the semiconductor substrate including:
• a semiconductor region between the first and second surfaces;
• an n-type semiconductor region provided on the first surface and higher in donor concentration than the semiconductor region;
• a damaged region provided on the second surface and being in contact with the insulation resin layer;
• and
• a p-type semiconductor region provided between the damaged region and the n-type semiconductor region, closer to the second surface than the n-type semiconductor region in a direction from the first surface toward the second surface of the semiconductor substrate, and higher in acceptor concentration than the semiconductor region.