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US 11,694,980 B2Granted
Semiconductor stack and method for manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsHyungjun Jeon, Kwangjin Moon, Hakseung Lee, Hyoukyung Cho
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Abstract
A semiconductor stack and a method for manufacturing the same are disclosed. The semiconductor stack includes a lower chip, an upper chip disposed over the lower chip, an upper lateral-side passivation layer surrounding side surfaces of the upper chip, and a plurality of bonding pads and a bonding passivation layer disposed between the upper chip and the lower chip.
Claims9
A method of forming a semiconductor stack, comprising:
- providing a carrier substrate;
- disposing a plurality of first semiconductor chips that are known good dies on the carrier substrate to be horizontally spaced apart from each other;
- filling spaces between the first semiconductor chips with a passivation layer that contacts side surfaces of the first semiconductor chips;
- forming a first layer including a plurality of first external bonding pads and a first bonding passivation layer with the first semiconductor chips, the first layer being provided on a surface of the passivation layer;
- providing a plurality of second semiconductor chips horizontally adjacent to each other as part of a wafer;
- providing a second layer including a plurality of second external bonding pads and a second bonding passivation layer with the second semiconductor chips;
- bonding the plurality of first external bonding pads to the plurality of second external bonding pads, and bonding the first bonding passivation layer to the second bonding passivation layer to form a wafer level stacked structure;
- and
- dicing the wafer level stacked structure to form a plurality of individual semiconductor stacks.
6 more elements
Dependencies are inferred from the claim text.