Semiconductor devices and semiconductor packages including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsJu-Il Choi, Un-Byoung Kang, Jin Ho An, Jongho Lee, Jeonggi Jin, Atsushi Fujisaki
Life of this patent
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Abstract
Semiconductor devices are provided. A semiconductor device includes an insulating layer and a conductive element in the insulating layer. The semiconductor device includes a first barrier pattern in contact with a surface of the conductive element and a surface of the insulating layer. The semiconductor device includes a second barrier pattern on the first barrier pattern. Moreover, the semiconductor device includes a metal pattern on the second barrier pattern. Related semiconductor packages are also provided.
Claims20
A semiconductor package comprising:
- a first semiconductor package comprising a first re-distribution layer, a first semiconductor chip on an upper surface of the first re-distribution layer, and a terminal structure on an lower surface of the first re-distribution layer,
- wherein the first re-distribution layer comprises an insulating layer and a conductive element in the insulating layer,
- wherein the terminal structure comprises:
- a first barrier pattern and a second barrier pattern that are sequentially stacked on a surface of the conductive element and a surface of the insulating layer;
- a metal pattern on the second barrier pattern;
- and
- a connection terminal on the metal pattern,
- wherein a width of the second barrier pattern is smaller than a width of the first barrier pattern and a width of the metal pattern, and
- wherein the first barrier pattern includes metal nitride.
A semiconductor package comprising:
- a re-distribution layer including a conductive element and an insulating layer;
- a semiconductor chip on an upper surface of the re-distribution layer;
- a mold layer on the upper surface of the re-distribution layer and covering the semiconductor chip;
- and
- a terminal structure on a lower surface of the re-distribution layer,
- wherein the terminal structure includes:
- a first barrier pattern on a surface of the conductive element and a surface of the insulating layer and electrically connected to the conductive element;
- a second barrier pattern on a lower surface of the first barrier pattern;
- a metal pattern on a lower surface of the second barrier pattern;
- and
- a solder terminal on a lower surface of the metal pattern, and
- wherein the first barrier pattern includes metal nitride.
A semiconductor package comprising:
- a re-distribution layer including a conductive element and an insulating layer;
- a semiconductor chip on an upper surface of the re-distribution layer;
- a mold layer on the upper surface of the re-distribution layer and covering the semiconductor chip;
- and
- a terminal structure on a lower surface of the re-distribution layer,
- wherein the terminal structure includes:
- a first barrier pattern in contact with a lower surface of the conductive element and a lower surface of the insulating layer;
- a second barrier pattern on a lower surface of the first barrier pattern;
- a metal pattern on a lower surface of the second barrier pattern;
- and
- a solder terminal on a lower surface of the metal pattern,
- wherein the second barrier pattern includes titanium, and
- wherein a width of the second barrier pattern is smaller than a width of the first barrier pattern and a width of the metal pattern.
Dependencies are inferred from the claim text.