Chip package structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJiun-Ting Chen, Ying-Ching Shih, Szu-Wei Lu, Chih-Wei Wu
Life of this patent
Estimating the term…
Abstract
A chip package structure is provided. The chip package structure includes a substrate. The chip package structure also includes a first chip structure and a second chip structure over the substrate. The chip package structure further includes an anti-warpage bar over a first portion of the first chip structure and over a second portion of the second chip structure. A width of the anti-warpage bar overlapping the second portion of the second chip structure is greater than a width of the anti-warpage bar overlapping the first portion of the first chip structure.
Claims20
A chip package structure, comprising:
- a substrate;
- a first chip structure and a second chip structure over the substrate;
- and
- an anti-warpage bar over a first portion of the first chip structure and over a second portion of the second chip structure, wherein a width of the anti-warpage bar overlapping the second portion of the second chip structure is greater than a width of the anti-warpage bar overlapping the first portion of the first chip structure, wherein a bottom surface of the anti-warpage bar is at a level between a top surface of the second chip structure and a bottom surface of the second chip structure.
A chip package structure, comprising:
- a substrate;
- a first chip structure and a second chip structure over the substrate;
- an anti-warpage bar in the first chip structure and over at least a portion of the second chip structure;
- and
- a molding layer surrounding the first chip structure, the second chip structure, and the anti-warpage bar, wherein the anti-warpage bar is adjacent to a first sidewall of the first chip structure and a second sidewall of the second chip structure and separated from the first sidewall of the first chip structure and the second sidewall of the second chip structure by the molding layer.
A chip package structure, comprising:
- a substrate;
- a first chip structure and a second chip structure over the substrate, wherein the first chip structure and the second chip structure are spaced apart from each other wherein the first chip structure comprises a plurality of semiconductor dies and a molding layer surrounding the plurality of semiconductor dies;
- an anti-warpage bar in the first chip structure and in or over the second chip structure, wherein the anti-warpage bar continuously extends from the second chip structure into the first chip structure, and a top surface of the anti-warpage bar is lower than a top surface of the first chip structure;
- and
- an adhesive layer between the anti-warpage bar and the first chip structure, and between the anti-warpage bar and the second chip structure, wherein the adhesive layer is in direct contact with the molding layer.
Dependencies are inferred from the claim text.