Semiconductor package and method of fabricating the same
AssigneeSamsung Electronics Co., Ltd.
InventorYoungwoo Park
Life of this patent
Estimating the term…
Abstract
A semiconductor package is disclosed. The semiconductor package may include a substrate, a first semiconductor chip on the substrate, an inner mold layer provided on the substrate to at least partially enclose the first semiconductor chip, an inner shielding layer provided on the substrate to at least partially enclose the inner mold layer, a second semiconductor chip stack on the inner shielding layer, an outer mold layer provided on the substrate to at least partially enclose the inner shielding layer and the second semiconductor chip stack, and an outer shielding layer at least partially enclosing the outer mold layer. Each of the inner and outer shielding layers may include a conductive material, and the inner shielding layer may be electrically connected to a ground pad of the substrate.
Claims7
A semiconductor package, comprising:
- a substrate;
- a first semiconductor chip disposed on the substrate;
- an inner mold layer disposed on the substrate, wherein the inner mold layer at least partially encloses the first semiconductor chip;
- an inner shielding layer provided on the substrate, wherein the inner shielding layer at least partially encloses the inner mold layer;
- a second semiconductor chip stack on the inner shielding layer;
- an outer mold layer provided on the substrate, wherein the outer mold layer at least partially encloses the inner shielding layer and the second semiconductor chip stack;
- and
- an outer shielding layer at least partially enclosing the outer mold layer,
- wherein the inner shielding layer covers top and side surfaces of the inner mold layer,
- wherein each of the inner and outer shielding layers comprises a conductive material, and
- the inner shielding layer is electrically connected to the substrate by a ground pad.
A semiconductor package, comprising:
- a substrate;
- a first semiconductor chip disposed on the substrate;
- an inner mold layer disposed on the substrate, wherein the inner mold layer at least partially encloses the first semiconductor chip;
- an inner shielding layer provided on the substrate, wherein the inner shielding layer at least partially encloses the inner mold layer;
- a second semiconductor chip stack on the inner shielding layer;
- an outer mold layer provided on the substrate, wherein the outer mold layer at least partially encloses the inner shielding layer and the second semiconductor chip stack;
- an outer shielding layer at least partially enclosing the outer mold laver;
- and
- a ground dam disposed on a ground pad of the substrate,
- wherein each of the inner and outer shielding layers comprises a conductive material, and
- the inner shielding layer is electrically connected to the substrate by the ground pad,
- wherein the ground dam comprises a conductive material and is electrically connected to the ground pad, and
- wherein a side surface of the inner shielding layer is in contact with a side surface of the ground dam.
Dependencies are inferred from the claim text.