Semiconductor wafer and semiconductor chip

A semiconductor wafer formed with a plurality of first regions each provided with a memory cell array and a peripheral circuit formed under the memory cell array to drive the memory cell array, and a second region between the first regions, the semiconductor wafer comprising:

• a material film covering the memory cell array and the peripheral circuit,
• a plurality of first structures provided in the material film and extending along in a first direction perpendicular to the semiconductor wafer, each of the plurality of first structures containing a first embedding material, the plurality of first structures being apart from each other along a second direction parallel to the semiconductor wafer, a bottom end of each of the plurality of first structures being approximately equal in height from the semiconductor wafer, and an upper end of each of the plurality of first structures being approximately equal in height from the semiconductor wafer,
• the plurality of first structures being between edges of the first regions and a third region that is cut in the second region when the first regions are separated,
• a second structure provided in the material film and extending along in the first direction, the second structure containing a second embedding material, the second structure being between the plurality of first structures and the memory cell array, and an upper end of the second structure being higher than the upper end of the plurality of the first structures,
• wherein
• the first structure is above a transistor included in the peripheral circuit,
• the first embedding material includes a void formed therein,
• a lower end of the void is above the transistor, and
• a recess is formed in the material film closer to the second region than the second structure is to the second region.