Backside wafer dopant activation
AssigneeApplied Materials, Inc.
InventorsQintao Zhang, Wei Zou
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Abstract
Disclosed herein are methods for backside wafer dopant activation using a high-temperature ion implant. In some embodiments, a method may include forming a semiconductor device atop a first main side of a substrate, and performing a high-temperature ion implant to a second main side of the substrate, wherein the first main side of the substrate is opposite the second main side of the substrate. The method may further include performing a second ion implant to the second main side of the substrate to form a collector layer.
Claims18
A method, comprising:
- forming a semiconductor device atop a first main side of a substrate;
- performing a first ion implant to a second main side of the substrate while a platen supporting the substrate is at a high-temperature, wherein the first main side of the substrate is opposite the second main side of the substrate;
- performing a second ion implant to the second main side of the substrate to form a collector layer, wherein the second ion implant is performed immediately following the first ion implant, and wherein the collector layer is a collector electrode;
- and
- annealing the semiconductor device and the substrate following formation of the collector electrode using a furnace annealing process at a temperature less than 450° C.
A method, comprising:
- forming a semiconductor device atop a first main side of a substrate;
- performing a first ion implant to a second main side of the substrate while a platen supporting the substrate is at a high-temperature, wherein the first main side of the substrate is opposite the second main side of the substrate;
- performing a second ion implant to the second main side of the substrate to form a collector layer, wherein the second ion implant is performed immediately after the first ion implant, and wherein the collector layer is a collector electrode;
- and
- annealing the semiconductor device and the substrate following formation of the collector electrode using a furnace annealing process at a temperature less than 450° C.
A wafer backside dopant activation method, comprising:
- forming a semiconductor device atop a first main side of a substrate;
- inverting the substrate;
- performing a first ion implant to a second main side of the substrate after the substrate is inverted and while a platen supporting the substrate is at a high-temperature, wherein the first main side of the substrate is opposite the second main side of the substrate;
- performing a boron ion implant to the second main side of the substrate to form a collector layer, wherein the boron ion implant is performed immediately after the first ion implant, and wherein the collector layer is a collector electrode;
- and
- annealing the semiconductor device and the substrate following formation of the collector electrode using a furnace annealing process at a temperature less than 450° C.
Dependencies are inferred from the claim text.