Structures and methods of identifying unprogrammed bits for one-time-programmable-memory (OTPM)
AssigneeGlobalFoundries U.S. Inc.
InventorsBalaji Jayaraman, Toshiaki Kirihata, Amit K. Mishra
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Abstract
The present disclosure relates to integrated circuits, and more particularly, to a method for identifying unprogrammed bits for one-time-programmable memory (OTPM) and a corresponding structure. In particular, the present disclosure relates to a structure including: a read circuit configured to perform at least one read operation at an address for a twin-cell one-time-programmable-memory (OTPM); and a comparison circuit configured to identify whether at least one bit of the address for the twin-cell OTPM has been programmed based on the at least one read operation.
Claims20
A structure, comprising:
- a comparison circuit configured to identify whether at least one bit of an address for at least one twin-cell OTPM has been programmed based on at least one read operation,
- wherein the comparison circuit checks an error correction circuit (ECC) flag bit of the at least one twin-cell OTPM to identify whether the at least one bit of the address for the at least one twin-cell OTPM has been programmed and also checks another ECC flag bit of the at least one twin-cell OTPM to identify whether another bit of another address for the at least one twin-cell OTPM has been programmed, and
- an OR gate receives the ECC flag bit and the another ECC flag bit and outputs a block usage flag output (BUF).
A structure, comprising:
- a comparison circuit which comprises a hardware memory controller which:
- identifies whether at least one bit of a first predetermined address for at least one twin-cell one-time-programmable memory (OTPM) has been programmed and whether at least one bit of a second predetermined address for the at least one twin-cell OTPM has been programmed based on a first read operation and a second read operation,
- checks an error correction circuit (ECC) flag bit of the at least one twin-cell OTPM to identify whether the at least one bit of the first predetermined address for the at least one twin-cell OTPM has been programmed;
- checks another ECC flag bit of the at least one twin-cell OTPM to identify whether the at least one bit of the second predetermined address for the at least one twin-cell OTPM has been programmed;
- and
- an OR gate which receives the ECC flag bit and the another ECC flag bit and outputs a block usage flag output (BUF).
A method, comprising:
- identifying whether at least one bit of an address for at least one twin-cell one-time-programmable memory (OTPM) has been programmed based on at least one read operation;
- checking an error correction circuit (ECC) flag bit of the at least one twin-cell OTPM to identify whether the at least one bit of the address for the at least one twin-cell OTPM has been programmed;
- checking another ECC flag bit of the at least one twin-cell OTPM to identify whether another bit of another address for the at least one twin-cell OTPM has been programmed;
- and
- receiving the ECC flag bit and the another ECC flag bit and outputs a block usage flag output (BUF).
Dependencies are inferred from the claim text.