Memory devices including heaters
AssigneeMicron Technology, Inc.
InventorsTomoko Ogura Iwasaki, Foroozan Koushan, Jayasree Nayar, Ji-Hye Gale Shin
Life of this patent
Estimating the term…
Abstract
Memory devices might include an array of memory cells, a plurality of access lines, and a heater. The array of memory cells might include a plurality of strings of series-connected memory cells. Each access line of the plurality of access lines might be connected to a control gate of a respective memory cell of each string of series-connected memory cells of the plurality of strings of series-connected memory cells. The heater might be adjacent to an end of each access line of the plurality of access lines.
Claims20
A memory device comprising:
- an array of memory cells comprising a plurality of blocks of memory cells;
- and
- a plurality of heaters, each heater of the plurality of heaters adjacent to a respective block of memory cells of the plurality of blocks of memory cells,
- wherein each heater of the plurality of heaters comprises a first electrically conductive plate on a first side of the respective block of memory cells, a second electrically conductive plate on a second side of the respective block of memory cells, and a third electrically conductive plate on a third side of the respective block of memory cells extending between the first electrically conductive plate and the second electrically conductive plate.
A memory device comprising:
- an array of memory cells comprising a plurality of blocks of memory cells;
- and
- a plurality of heaters, each heater of the plurality of heaters adjacent to a respective block of memory cells of the plurality of blocks of memory cells,
- wherein each heater of the plurality of heaters comprises a first plurality of electrically conductive through-array vias (TAVs) on a first side of the respective block of memory cells, a second plurality of electrically conductive TAVs on a second side of the respective block of memory cells, and a third plurality of electrically conductive TAVs on a third side of the respective block of memory cells extending between the first plurality of electrically conductive TAVs and the second plurality of electrically conductive TAVs.
A memory device comprising:
- an array of memory cells;
- a heater adjacent to the array of memory cells;
- a power supply node;
- a switch electrically coupled between the heater and the power supply node;
- and
- control logic electrically coupled to a control input of the switch, the control logic configured to turn on the switch to pass a current through the heater in response to a threshold value for the array of memory cells being exceeded.
Dependencies are inferred from the claim text.