Data interface device and method of display apparatus
AssigneeLG Display Co., Ltd.
InventorsYang Seok Jeong, Young Ho Kim, Dong In Noh
Life of this patent
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Abstract
Disclosed herein is a data interface device of a display apparatus including a timing controller, encoding clock-embedded image data corresponding to a logic high period of a data enable signal and clock-embedded blank data corresponding to a logic low period of the data enable signal and transferring an encoded data transfer packet to a transfer line, and a source integrated circuit generating an internal clock based on the encoded data transfer packet received through the transfer line and selectively decoding the clock-embedded image data based on the internal clock, wherein a transition pattern of the clock-embedded blank data differs in a plurality of transfer lines.
Claims16
A data interface device of a display apparatus, the data interface device comprising:
- a first transfer circuit encoding first clock-embedded image data corresponding to a logic high period of a data enable signal and first clock-embedded blank data corresponding to a logic low period of the data enable signal and transferring an encoded first data transfer packet to a first transfer line;
- a first reception circuit generating a first internal clock based on the encoded first data transfer packet received through the first transfer line and decoding the first clock-embedded image data based on the first internal clock;
- a second transfer circuit encoding second clock-embedded image data corresponding to the logic high period of the data enable signal and second clock-embedded blank data corresponding to the logic low period of the data enable signal and transferring an encoded second data transfer packet to a second transfer line;
- and
- a second reception circuit generating a second internal clock based on the encoded second data transfer packet received through the second transfer line and decoding the second clock-embedded image data based on the second internal clock,
- wherein a first transition pattern of the first clock-embedded blank data differs from a second transition pattern of the second clock-embedded blank data.
A data interface device of a display apparatus, the data interface device comprising:
- a timing controller encoding clock-embedded image data corresponding to a logic high period of a data enable signal and clock-embedded blank data corresponding to a logic low period of the data enable signal and transferring an encoded data transfer packet to a transfer line;
- and
- a source integrated circuit generating an internal clock based on the encoded data transfer packet received through the transfer line and selectively decoding the clock-embedded image data based on the internal clock,
- wherein a transition pattern of the clock-embedded blank data differs in a plurality of transfer lines.
A data interface method of a display apparatus, the data interface method comprising:
- encoding clock-embedded image data corresponding to a logic high period of a data enable signal and clock-embedded blank data corresponding to a logic low period of the data enable signal, and transferring an encoded data transfer packet to a transfer line;
- and
- generating an internal clock based on the encoded data transfer packet received through the transfer line and selectively decoding the clock-embedded image data based on the internal clock,
- wherein a transition pattern of the clock-embedded blank data differs in a plurality of transfer lines.
Dependencies are inferred from the claim text.