Display panel having different light-emitting elements

A display panel, comprising:

• a first light-emitting element and a second light-emitting element and
• a first driver circuit and a second driver circuit wherein the first driver circuit is electrically connected to the first light-emitting element and configured to provide a first drive current to the first light-emitting element to control the first light-emitting element to emit light, and the second driver circuit is electrically connected to the second light-emitting element and configured to provide a second drive current to the second light-emitting element to control the second light-emitting element to emit light
• wherein each of the first driver circuit and the second driver circuit comprises a pulse-width modulation circuit,
• wherein the first driver circuit and the second driver circuit satisfy that ΔVdata_PWM (1)<ΔVdata_PWM (2);
• wherein ΔVdata_PWM (1) and ΔVdata_PWM (2) are a voltage range of the pulse-width modulation data voltage Vdata_PWM configured for the pulse-width modulation circuit in the first driver circuit and a voltage range of the pulse-width modulation data voltage Vdata_PWM configured for the pulse-width modulation circuit in the second driver circuit, respectively.

A display panel, comprising:

• a first light-emitting element and a second light-emitting element;
• and
• a first driver circuit and a second driver circuit wherein the first driver circuit is electrically connected to the first light-emitting element and configured to provide a first drive current to the first light-emitting element to control the first light-emitting element to emit light, and the second driver circuit is electrically connected to the second light-emitting element and configured to provide a second drive current to the second light-emitting element to control the second light-emitting element to emit light;
• wherein each of the first driver circuit and the second driver circuit comprises a pulse-amplitude modulation circuit and a pulse-width modulation circuit;
• wherein the pulse-amplitude modulation circuit of the first driver circuit is configured to control an amplitude of the first drive current based on an applied pulse-amplitude modulation data voltage Vdata_PAM, and the pulse-width modulation circuit of the first driver circuit is configured to control a pulse width of the first drive current based on an applied pulse-width modulation data voltage Vdata_PWM and a sweep signal V_SWEEP;
• the pulse-amplitude modulation circuit of the second driver circuit is configured to control an amplitude of the second drive current based on an applied pulse-amplitude modulation data voltage Vdata_PAM, and the pulse-width modulation circuit of the second driver circuit is configured to control a pulse width of the second drive current based on an applied pulse-width modulation data voltage Vdata_PWM and a sweep signal V_SWEEP
• wherein each of the pulse-amplitude modulation circuit and the pulse-width modulation circuit comprises an initialization unit, a data write unit, a threshold compensation unit, a light emission control unit, a storage capacitor and a drive transistor;
• wherein the initialization unit is electrically connected between an initialization signal terminal and a first node and configured to provide an initialization signal from the initialization signal terminal to the first node at an initialization stage;
• wherein the data write unit is electrically connected between a data signal terminal and a first electrode of the drive transistor, a gate of the drive transistor and a first plate of the storage capacitor are electrically connected to the first node;
• and the data write unit is configured to provide a data voltage signal from the data signal terminal to the first node through the drive transistor at a data write stage;
• wherein the threshold compensation unit is electrically connected between a second electrode of the drive transistor and the first node and configured to provide a threshold voltage of the drive transistor to the first node for compensation;
• wherein in the pulse-width modulation circuit, a second plate of the storage capacitor is electrically connected to a sweep signal terminal that receives the sweep signal V_SWEEP;
• the light emission control unit is electrically connected between a power signal terminal and the first node in the pulse-amplitude modulation circuit and configured to control, at a light emission stage, the drive transistor to generate a driving pulse;
• and the power signal terminal receives a second power voltage VDD_PWM, and the data signal terminal receives the pulse-width modulation data voltage Vdata_PWM;
• and
• wherein in the pulse-amplitude modulation circuit, a second plate of the storage capacitor is electrically connected to a power signal terminal that receives a first power voltage VDD_PAM;
• the light emission control unit is electrically connected between the power signal terminal and a light-emitting element and configured to control, at the light emission stage, the drive transistor to generate the drive current which flows into the light-emitting element to drive the light-emitting element to emit light;
• and the data signal terminal receives the pulse-amplitude modulation data voltage Vdata_PAM.