Pixel driving circuit, pixel driving method, display panel and display device

A pixel driving circuit, comprising:

• a current control sub-circuit coupled to a scan signal terminal, a gray scale data signal terminal, a first voltage signal terminal, and an enable signal terminal;
• the current control sub-circuit being configured to output a gray scale current signal to an element to be driven, according to a gray scale data signal from the gray scale data signal terminal, under the control of a scan signal from the scan signal terminal and an enable signal from the enable signal terminal;
• a gating sub-circuit coupled to the scan signal terminal, a reset signal terminal, a gating data signal terminal, and a pulse voltage signal terminal;
• the gating sub-circuit being configured to drive the element to be driven to continuously emit light, under the control of the scan signal from the scan signal terminal and a gating data signal from the gating data signal terminal, and to drive the element to be driven to intermittently emit light, under the control of a reset signal from the reset signal terminal, the gating data signal from the gating data signal terminal and a pulse voltage signal from the pulse voltage signal terminal,
• wherein the gating sub-circuit is coupled to the current control sub-circuit and the element to be driven;
• the element to be driven is coupled to a second voltage signal terminal,
• wherein the gating sub-circuit comprises:
• a first transistor having a control electrode coupled to the scan signal terminal, a first electrode coupled to the gating data signal terminal, and a second electrode coupled to a first node;
• a first storage capacitor having a first terminal coupled to an initialization signal terminal and a second terminal coupled to the first node;
• a second transistor having a control electrode coupled to the first node, a first electrode coupled to the current control sub-circuit, and a second electrode coupled to the element to be driven;
• a third transistor having a control electrode coupled to the reset signal terminal, a first electrode coupled to the gating data signal terminal, and a second electrode coupled to the second node;
• a second storage capacitor having a first terminal coupled to the initialization signal terminal and a second terminal coupled to the second node;
• a fourth transistor having a control electrode coupled to the second node and a first electrode coupled to the current control sub-circuit;
• a fifth transistor having a control electrode coupled to the pulse voltage signal terminal, a first electrode coupled to a second electrode of the fourth transistor;
• a sixth transistor having a control electrode coupled to the second node, a first electrode coupled to a second electrode of the fifth transistor, and a second electrode coupled to the element to be driven.

A pixel driving circuit, comprising:

• a current control sub-circuit coupled to a scan signal terminal, a gray scale data signal terminal, a first voltage signal terminal, and an enable signal terminal;
• the current control sub-circuit being configured to output a gray scale current signal to an element to be driven, according to a gray scale data signal from the gray scale data signal terminal, under the control of a scan signal from the scan signal terminal and an enable signal from the enable signal terminal;
• a gating sub-circuit coupled to the scan signal terminal, a reset signal terminal, a gating data signal terminal, and a pulse voltage signal terminal;
• the gating sub-circuit being configured to drive the element to be driven to continuously emit light, under the control of the scan signal from the scan signal terminal and a gating data signal from the gating data signal terminal, and to drive the element to be driven to intermittently emit light, under the control of a reset signal from the reset signal terminal, the gating data signal from the gating data signal terminal and a pulse voltage signal from the pulse voltage signal terminal,
• wherein the gating sub-circuit is coupled to a second voltage signal terminal and the element to be driven;
• the current control sub-circuit is coupled to the element to be driven,
• wherein the gating sub-circuit comprises:
• a first transistor having a control electrode coupled to the scan signal terminal, a first electrode coupled to the gating data signal terminal, and a second electrode coupled to a first node;
• a first storage capacitor having a first terminal coupled to an initialization signal terminal and a second terminal coupled to the first node;
• a second transistor having a control electrode coupled to the first node, a first electrode coupled to the element to be driven, and a second electrode coupled to the second voltage signal terminal;
• a third transistor having a control electrode coupled to the reset signal terminal, a first electrode coupled to the gating data signal terminal, and a second electrode coupled to the second node;
• a second storage capacitor having a first terminal coupled to the initialization signal terminal and a second terminal coupled to the second node;
• a fourth transistor having a control electrode coupled to the second node, a first electrode coupled to the element to be driven;
• a fifth transistor having a control electrode coupled to the pulse voltage signal terminal, a first electrode coupled to a second electrode of the fourth transistor;
• a sixth transistor having a control electrode coupled to the second node, a first electrode coupled to a second electrode of the fifth transistor, and a second electrode coupled to the second voltage signal terminal.