Multi-die integrated circuit with data processing engine array

A multi-die integrated circuit, comprising:

• a package substrate;
• one or more interconnect bridge dies coupled to the package substrate;
• a first die coupled to the package substrate and the one or more interconnect bridge dies, wherein the first die includes a first data processing engine (DPE) array;
• wherein the first DPE array includes a first plurality of DPEs and a first DPE interface coupled to the first plurality of DPEs therein;
• a second die coupled to the package substrate and the one or more interconnect bridge dies, wherein the second die includes a second DPE array;
• wherein the second DPE array includes a second plurality of DPEs and a second DPE interface coupled to the second plurality of DPEs therein;
• and
• a third die coupled to the substrate and the one or more interconnect bridge dies, wherein the third die includes a plurality of die interfaces;
• wherein the first DPE interface of the first die is configured to communicate with a first die interface of the plurality of die interfaces via the one or more interconnect bridge dies;
• and
• wherein the second DPE interface of the second die is configured to communicate with a second die interface of the plurality of die interfaces via the one or more interconnect bridge dies.