Tunable and scalable command/address protocol for non-volatile memory
AssigneeSanDisk Technologies LLC
InventorsSneha Bhatia, Vinayak Ghatawade
Life of this patent
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Abstract
A data storage system includes a storage medium including a plurality of memory cells; a storage controller in communication with the storage medium; and an electrical interface between the storage medium and the storage controller. The electrical interface includes an N-bit data bus; a data strobe; a command latch enable signal; and an address latch enable signal; wherein, while the command latch signal or the address latch enable signal is asserted, the storage medium is configured to: (i) receive command or address data via a subset of lines of the data bus; and (ii) latch the command or address data using the data strobe.
Claims20
A data storage system, comprising:
- a storage medium including a plurality of memory cells;
- a storage controller in communication with the storage medium;
- and
- an electrical interface between the storage medium and the storage controller, the electrical interface including:
- an N-bit data bus, where N is greater than or equal to two;
- a connection configured to carry a data strobe;
- a connection configured to carry a command latch enable signal;
- and
- a connection configured to carry an address latch enable signal;
- wherein, while the command latch enable signal or the address latch enable signal is asserted, the storage medium is configured to:
- (i) receive command or address data via a subset of lines of the data bus;
- and
- (ii) latch the command or address data using the data strobe.
A method of performing operations at an electrical interface between a storage medium including a plurality of memory cells and a storage controller in communication with the storage medium,
- the electrical interface including:
- an N-bit data bus, wherein N is greater than or equal to two;
- a connection configured to carry a data strobe;
- a connection configured to carry a command latch enable signal;
- and
- a connection configured to carry an address latch enable signal;
- the method comprising, while the command latch enable signal or the address latch enable signal is asserted:
- receiving command or address data via a subset of lines of the N-bit data bus of the electrical interface;
- and
- latching the command or address data using the data strobe of the electrical interface.
A data storage system, comprising:
- a storage medium including a plurality of memory cells;
- a storage controller in communication with the storage medium;
- and
- an electrical interface between the storage medium and the storage controller, the electrical interface including:
- command or address data receiving means configured to receiving command or address data via a subset of lines of an N-bit data bus of the electrical interface, where N is greater than or equal to two;
- and
- latching means configured to latch the command or address data using a data strobe of the electrical interface while a command latch enable signal of the electrical interface or an address latch enable signal of the electrical interface is asserted.
Dependencies are inferred from the claim text.