Back to results
US 11,693,791 B2Granted
Victim cache that supports draining write-miss entries
AssigneeTexas Instruments Incorporated
InventorsNaveen Bhoria, Timothy David Anderson, Pete Hippleheuser
Life of this patent
Estimating the term…
Abstract
A caching system including a first sub-cache and a second sub-cache in parallel with the first sub-cache, wherein the second sub-cache includes a set of cache lines, line type bits configured to store an indication that a corresponding cache line of the set of cache lines is configured to store write-miss data, and an eviction controller configured to flush stored write-miss data based on the line type bits.
Claims20
An eviction method, comprising:
- detecting an idle activity on a processor interface;
- and
- in response to detecting the idle activity on the processor interface:
- determining a write-miss entry inside a victim cache, wherein the write-miss entry is associated with a line type;
- and
- draining the write-miss entry from the victim cache based on the line type.
3 more elements
A device, comprising:
- a victim cache;
- and
- a victim cache controller configured to detect an idle activity on a processor interface;
- wherein in response to detecting the idle activity on the processor interface, the victim cache controller is configured to:
- determine a write-miss entry inside the victim cache, wherein the write-miss entry is associated with a line type;
- and
- flush the write-miss entry from the victim cache based on the line type.
4 more elements
Dependencies are inferred from the claim text.