Caching or evicting host-resident translation layer based on counter
AssigneeMicron Technology, Inc.
InventorsDionisio Minopoli, Daniele Balluchi
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AssigneeMicron Technology, Inc.
InventorsDionisio Minopoli, Daniele Balluchi
Estimating the term…
A processing device in a memory system receives, from a host system, a read command comprising an indication of a sub-region of a logical address space of a memory device. The processing device increments a counter associated with a region of the logical address space, the region comprising a plurality of sub-regions including the sub-region, the counter to track a number of read operations performed on the plurality of sub-regions of the region, wherein the counter is periodically decremented in response to an occurrence of a recency event on the memory device. The processing device further determines whether a value of the counter satisfies a cacheable threshold criterion and, responsive to the value of the counter satisfying the cacheable threshold criterion, sends, to the host system, a recommendation to activate the sub-region.
A method comprising:
A system comprising:
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
Dependencies are inferred from the claim text.