Selectively utilizing a read page cache mode in a memory subsystem

A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:

• receive a memory command targeted at a memory array of a memory subsystem;
• determine if the memory command is a milt-plane memory command having a first priority;
• determine if the memory subsystem is processing memory commands having a second priority that is less than the first priority;
• enable a read page cache mode for processing the memory command in response to determining that (1) the memory command has the first priority and (2) the memory subsystem is not processing any memory commands having the second priority, wherein the read page cache mode allows multiple reads to be performed in parallel by using a primary data cache register and a secondary data cache register;
• and
• process the memory command using the read page cache mode.

A system comprising:

• a memory device;
• and
• a processing device, operatively coupled with the memory device, to:
• determine if a memory command, to be processed in relation to the memory device, is a multi-plane memory command having a first priority;
• determine if the system is processing any multi-plane memory commands having a second priority that is less than the first priority;
• enable a read page cache mode for processing the memory command in response to determining that (1) the memory command has the first priority and (2) the memory device is not processing any memory commands having the second priority, wherein the read page cache mode allows multiple reads to be performed in parallel by using a primary data cache register and a secondary data cache register;
• and
• process the memory command using the read page cache mode.