Data processing apparatus having streaming engine with read and read/advance operand coding
AssigneeTexas Instruments Incorporated
InventorJoseph Zbiciak
Life of this patent
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Abstract
A streaming engine employed in a digital signal processor specified a fixed data stream. Once started the data stream is read only and cannot be written. Once fetched, the data stream is stored in a first-in-first-out buffer for presentation to functional units in the fixed order. Data use by the functional unit is controlled using the input operand fields of the corresponding instruction. A read only operand coding supplies the data an input of the functional unit. A read/advance operand coding supplies the data and also advances the stream to the next sequential data elements. The read only operand coding permits reuse of data without requiring a register of the register file for temporary storage.
Claims18
A processor comprising:
- a plurality of functional units;
- a streaming engine that includes a stream head register configured to store a portion of a data stream;
- and
- an instruction decoder coupled to the plurality of functional units and the streaming engine, wherein the instruction decoder is configured to:
- receive an instruction execute packet that includes a first instruction and a second instruction to be performed in parallel, wherein:
- the first instruction includes a first coded source operand;
- and
- the second instruction includes a second coded source operand;
- decode the first coded source operand to obtain an identification of a register and a first action to perform with respect to the register;
- and
- decode the second coded source operand to obtain the identification of the register and a second action to perform with respect to the register;
- cause the streaming engine to, in response to the first instruction, provide a first value of the data stream stored in the stream head register to a first functional unit of the plurality of functional units;
- and
- cause the streaming engine to, in response to the second instruction:
- provide the first value stored in the stream head register to a second functional unit of the plurality of functional units;
- and
- replace the first value in the stream head register with a second value of the data stream.
A method comprising:
- receiving a packet that includes a first instruction that includes a first coded source operand and a second instruction that includes a second coded source operand, wherein the first instruction and the second instruction are to be performed in parallel;
- decoding the first coded source operand to obtain an identification of a stream head register of a processor and a first action to perform with respect to the stream head register;
- in response to the first instruction, providing a first value from the stream head register to a first functional unit of the processor according to the first action;
- decoding the second coded source operand to obtain the identification of the stream head register of the processor and a second action to perform with respect to the stream head register;
- and
- in response to the second instruction and according to the second action:
- providing the first value from the stream head register to a second functional unit of the processor;
- and
- replacing the first value in the stream head register with a second value.
Dependencies are inferred from the claim text.