Detection of illegal commands
AssigneeMicron Technology, Inc.
InventorsMichael Dieter Richter, Markus Balb
Life of this patent
Estimating the term…
Abstract
Methods, systems, and devices for detection of illegal commands are described. A memory device, such as a dynamic random access memory (DRAM), may receive a command from a device, such as a host device, to perform an access operation on at least one memory cell of a memory device. The memory device may determine, using a detection component, that a timing threshold associated with an operation of the memory device would be violated by performing the access operation. The memory device may refrain from executing the access operation based on determining that performing the access operation included in the command would violate the timing threshold. The memory device may transmit, to the device, an indication that performing the command would violate the timing threshold.
Claims20
A method, comprising:
- receiving, at a memory device, a first command for determining a timing parameter associated with communications between a host device and the memory device;
- refraining from locking a bank associated with one or more memory cells of the memory device based at least in part on receiving the first command;
- transmitting first signaling to the host device based at least in part on refraining from locking the bank associated with the one or more memory cells, wherein the first signaling comprises an indication of an error;
- and
- receiving, at the memory device based at least in part on transmitting the first signaling, a second command to perform an access operation on the one or more memory cells of the memory device.
A method, comprising:
- transmitting, at a host device, a first command for determining a timing parameter associated with communications between the host device and a memory device;
- receiving first signaling from the memory device based at least in part on transmitting the first command, wherein the first signaling comprises an indication of an error;
- determining the timing parameter based at least in part on transmitting the first command and receiving the first signaling, wherein the timing parameter comprises a duration between the host device transmitting the first command and receiving the first signaling;
- and
- transmitting, at the host device, a second command to perform an access operation on one or more memory cells of the memory device.
An apparatus, comprising:
- a controller associated with a memory device, wherein the controller is configured to cause the apparatus to:
- receive a first command for determining a timing parameter associated with communications between a host device and the memory device;
- refrain from locking a bank associated with one or more memory cells of the memory device based at least in part on receiving the first command;
- transmit first signaling based at least in part on refraining from locking the bank associated with the one or more memory cells, wherein the first signaling comprises an indication of an error;
- and
- receive a second command to perform an access operation on the one or more memory cells of the memory device.
Dependencies are inferred from the claim text.