Storage device using cache buffer and method of operating the same
AssigneeSK hynix Inc.
InventorGi Pyo Um
Life of this patent
Estimating the term…
Abstract
A storage device capable of maintaining consistency of data for the same address may include a memory device including a plurality of memory blocks, a buffer memory device including a plurality of cache buffers temporarily storing data previously received from a host, and a memory controller configured to receive a write request and a write data from the host and configured to control the buffer memory device and the memory device to store a previously received data, stored in one of the plurality of cache buffers with a logical address that matches a logical address of the write data, in the memory device before the write request is processed.
Claims20
A storage device comprising:
- a memory device including a plurality of memory blocks;
- a plurality of cache buffers configured to temporarily store data received from a host;
- and
- a memory controller configured to:
- in response to a write request and write data received from the host while previously received write data is stored in a first cache buffer corresponding to attribute information of the previously received write data, store the write data in a second cache buffer corresponding to attribute information of the write data, from among the plurality of cache buffers, and
- in response to a logical address of the previously received write data being the same as a logical address of the write data, control the first cache buffer to store the previously received write data in the memory device before the write request is processed.
A memory controller that controls a memory device, comprising:
- a first cache buffer configured to temporarily store data having a first attribute among data provided from a host;
- a second cache buffer configured to temporarily store data having a second attribute among the data provided from the host;
- a first command list storage configured to store commands related to a logical address of the data stored in the first cache buffer;
- a second command list storage configured to store commands related to a logical address of the data stored in the second cache buffer;
- and
- a write operation controller configured to control the memory device to store the data that is temporarily stored in the second cache buffer in the memory device when a write data having the first attribute is input from the host and a command related to the same logical address as a logical address of the write data is stored in the second command list storage.
A method of operating a memory controller that controls a memory device, the method comprising:
- temporarily storing first data received from a host in a first cache buffer corresponding to a first attribute of the first data among a plurality of cache buffers;
- temporarily storing second data received from the host in a second cache buffer corresponding to a second attribute of the second data among the plurality of cache buffers;
- and
- in response to a logical address of the first data being the same as a logical address of the second data controlling the first cache buffer storing the first data to store the first data in the memory device, before storing the second data in the memory device.
Dependencies are inferred from the claim text.