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US 11,693,586 B2Granted
Over provisioning component for memory management
AssigneeMicron Technology, Inc.
InventorsXiangang Luo, Jianmin Huang
Life of this patent
Estimating the term…
Abstract
The present disclosure relates to designating or allocating static and dynamic SLC blocks between a non-write burst free block pool and a write burst free block pool. In some embodiments, a free block pool can be utilized by a host for write burst operations and/or non-write burst operations. In these embodiments, the over provisioning portion of the memory sub-system can be designated into a plurality of portions.
Claims19
A method, comprising:
- designating, by an over provisioning component, a first set of memory cells of a memory array for use in write burst mode operations;
- designating a second set of memory cells of the memory array for use in non-write burst mode operations;
- identifying that a request to perform a particular non-write burst operation exceeds a quantity of memory cells available to the second set of memory cells for use in the non-write burst mode writing operations;
- designating, by the over provisioning component, a portion of the first set of memory cells as a static single level cell (SLC) block for use in the non-write burst mode writing operations in response to the request;
- writing data associated with the particular non-write burst writing operation to the static SLC block;
- designating a dynamic SLC block from the first set of memory cells to the second set of memory cells when the static SLC block is designated to the first set of memory cells;
- recording a count when no dynamic SLC blocks are available from the first set of memory cells;
- and
- preventing a write burst buffer size from being increased in response to recording the count.
6 more elements
An apparatus, comprising:
- a memory array;
- and
- an over provisioning component coupled to the memory array and configured to:
- designate a set of memory cells of the memory array for over provisioning;
- designate a first portion of the set of memory cells as free write burst blocks, wherein the first portion includes dynamic single level cell (SLC) blocks and static SLC blocks;
- designate a second portion of the set of memory cells as free non-write burst blocks, wherein the second portion includes dynamic SLC blocks;
- designate a static SLC block from the first portion to the second portion to be used as free non-write burst blocks;
- perform non-write burst operations using the designated static SLC block;
- open a third portion of the memory array as free non-write burst blocks when the static SLC block is exceeded from the non-write burst write operations;
- and
- designate free dynamic SLC blocks from a write burst data pool to the second portion in response to performance of a write burst flush operation.
8 more elements
A system, comprising:
- a plurality of memory components arranged to form a stackable cross-gridded array of interleaved NAND memory cells;
- and
- a processing device coupled to the plurality of memory components, the processing device to perform operations comprising:
- designating a set of memory cells of the NAND memory cells for over provisioning;
- designating a first portion of the set of memory cells as free write burst blocks, wherein the first portion includes static single level cell (SLC) blocks;
- identifying a second portion of the set of memory cells as data write burst blocks with data stored from write burst writing operations;
- designating a third portion of the set of memory cells as free non-write burst blocks, wherein the third portion includes dynamic SLC blocks;
- identifying a fourth portion of the set of memory cells as data non-write burst blocks with data stored from non-write burst writing operations;
- designating a static SLC block from the first portion to the third portion to be used as free non-write burst blocks;
- performing non-write burst write operations using the designated static SLC block to store data associated with the non-write burst write operations;
- identifying the static SLC block as part of the fourth portion when the non-write burst write operation is performed;
- designating the static SLC block as part of the first portion in response to a performance of a media management operation that involves removing the data associated with the non-write burst write operations;
- and
- recording a count of a situation when determining that there are no available dynamic SLC blocks in the first portion.
11 more elements
An apparatus, comprising:
- a memory array;
- and
- an over provisioning component coupled to the memory array and configured to:
- designate a set of memory cells of the memory array for over provisioning;
- designate a first portion of the set of memory cells as free write burst blocks, wherein the first portion includes dynamic single level cell (SLC) blocks and static SLC blocks;
- designate a second portion of the set of memory cells as free non-write burst blocks, wherein the second portion includes dynamic SLC blocks;
- designate a static SLC block from the first portion to the second portion to be used as free non-write burst blocks;
- perform non-write burst operations using the designated static SLC block;
- open a third portion of the memory array as free non-write burst blocks when the static SLC block is exceeded from the non-write burst write operations;
- designate the static SLC block back to the first portion from the second portion after a media management operation is performed on the memory array;
- and
- designate a dynamic SLC block from the first portion to the second portion in response to designating the static SLC block back to the first portion.
9 more elements
A system, comprising:
- a plurality of memory components arranged to form a stackable cross-gridded array of interleaved NAND memory cells;
- and
- a processing device coupled to the plurality of memory components, the processing device to perform operations comprising:
- designating a set of memory cells of the NAND memory cells for over provisioning;
- designating a first portion of the set of memory cells as free write burst blocks, wherein the first portion includes static single level cell (SLC) blocks;
- identifying a second portion of the set of memory cells as data write burst blocks with data stored from write burst writing operations;
- designating a third portion of the set of memory cells as free non-write burst blocks, wherein the third portion includes dynamic SLC blocks;
- identifying a fourth portion of the set of memory cells as data non-write burst blocks with data stored from non-write burst writing operations;
- designating a static SLC block from the first portion to the third portion to be used as free non-write burst blocks;
- performing non-write burst write operations using the designated static SLC block to store data associated with the non-write burst write operations;
- identifying the static SLC block as part of the fourth portion when the non-write burst write operation is performed;
- designating the static SLC block as part of the first portion in response to a performance of a media management operation that involves removing the data associated with the non-write burst write operations, wherein the media management operation is a foreground garbage collection operation;
- determining when the first portion does not include dynamic SLC blocks;
- and
- preventing designating the static SLC block from the first portion to the third portion to be used as free non-write burst blocks.
12 more elements
Dependencies are inferred from the claim text.