Memory system and controller
AssigneeKioxia Corporation
InventorsYoshihisa Kojima, Katsuhiko Ueki
Life of this patent
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Abstract
In a memory system in an embodiment, in a case of normal operation, a control unit returns a write completion response upon completion of reception of write data from a host, and writes the write data into nonvolatile memory in a multiple values. In a case of unordinary power-off, changeover to operation using a backup battery is conducted and the control unit writes dirty data that is not completed in writing into the nonvolatile memory, into the nonvolatile memory with two values. When next boot, the control unit reads the dirty data from the nonvolatile memory into the volatile memory, and thereafter writes the dirty data into the nonvolatile memory in a multiple values.
Claims20
A method of controlling a memory system, the memory system including a nonvolatile memory, a buffer, and a battery configured to store power on the basis of power supplied from an external supply, said method comprising:
- determining that power becomes unsupplied from the external supply;
- and
- in response to the power becoming unsupplied, by using the power stored in the battery, stopping accepting new write commands from a host;
- determining that a completion response for a first write command received from the host has not been returned to the host;
- in response to the completion response for the first write command having not been returned to the host, cancelling the first write command;
- determining that a completion response for a second write command received from the host has been returned to the host;
- and
- in response to the completion response for the second write command having been returned to the host, writing second data stored in the buffer into the nonvolatile memory, the second data being data related to the second write command.
A method of controlling a solid state drive (SSD), the SSD including a NAND flash memory and a capacitor configured to store energy on the basis of energy supplied from a power source, said method comprising:
- determining that a completion response for a first write command received from a host has not been returned to the host and the energy has become unsupplied from the power source and
- in response to the completion response for the first write command having not been returned to the host and the energy having become unsupplied, by using energy discharged from the capacitor,
- stopping all new operations to the NAND flash memory for the first write command;
- and
- aborting the first write command.
Dependencies are inferred from the claim text.