Monolithic integrated quantum dot photonic integrated circuits
AssigneeThe Regents of the University of California
InventorsJohn E. Bowers, Arthur Gossard, Daehwan Jung, Justin Norman, Chen Shang, Yating Wan
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Abstract
A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.
Claims17
A photonic integrated circuit (PIC) comprising:
- a semiconductor substrate;
- a first III-V type semiconductor layer located vertically adjacent to the semiconductor substrate;
- one or more passive components fabricated in the first III-V type semiconductor layer;
- a first active component located adjacent the one or more passive components fabricated in the first III-V type semiconductor layer;
- and
- a second active component located adjacent the one or more passive components fabricated in the first III-V type semiconductor layer, wherein the first active component and second active component are fabricated in a second III-V type semiconductor layer located vertically adjacent to the first III-V semiconductor layer and wherein at least one of the first active component and/or the second active component includes one or more active layers comprised of quantum dots (QDs), wherein optical signals are communicated by the one or more passive components from the first active component to the second active component wherein at least one of the first active component or the second active component includes one or more active layers comprised of quantum wells (QWs).
A method of fabricating a monolithically integrated photonic integrated circuit (PIC), the method comprising:
- epitaxially depositing at least first and second III-V semiconductor layers on a semiconductor substrate, wherein the first III-V semiconductor layer is located vertically adjacent to the semiconductor substrate;
- and
- processing the first III-V semiconductor layers to fabricate passive components and processing the second III-V semiconductor layers to fabricate two or more active components, wherein at least one of the two or more active components are comprised of active regions that include quantum dot (QD) layers, wherein the QD layers are located vertically adjacent to the first III-V semiconductor layers and wherein the active components are optically coupled to one another via the passive components, wherein at least one of the two or more active components are comprised of active regions that include quantum wells (QW) layers, wherein the QW layers are located vertically adjacent to the first III-V semiconductor layers.
Dependencies are inferred from the claim text.