Cascaded sensing circuits for detecting and monitoring cracks in an integrated circuit

A method for detecting and monitoring a crack in an integrated circuit (IC), comprising:

• providing a plurality of structures in an inactive region of the IC, the plurality of structures extending about a barrier formed in the inactive region of the IC, wherein an active region of the IC is enclosed within the barrier;
• coupling a plurality of stages of sensing circuits to the plurality of structures, wherein each sensing circuit is coupled to a respective structure of the plurality of structures;
• enabling the sensing circuit in a stage N of the plurality of stages of sensing circuits;
• monitoring, by the enabled sensing circuit, a characteristic of the respective structure coupled to the enabled sensing circuit;
• and
• in response to detecting a change in the characteristic of the respective structure coupled to the enabled sensing circuit, outputting, by the enabled sensing circuit, an enable signal for enabling the sensing circuit in a downstream stage N+1 of the plurality of stages of sensing circuits.

A method, comprising:

• coupling a plurality of stages of sensing circuits to a plurality of structures on an integrated circuit (IC), wherein each sensing circuit is coupled to a respective structure of the plurality of structures;
• enabling the sensing circuit in a stage N of the plurality of stages of sensing circuits;
• monitoring, by the enabled sensing circuit, a characteristic of the respective structure coupled to the enabled sensing circuit;
• and
• in response to detecting a change in the characteristic of the respective structure coupled to the enabled sensing circuit, outputting, by the enabled sensing circuit, an enable signal for enabling the sensing circuit in a downstream stage N+1 of the plurality of stages of sensing circuits.