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US 11,690,306 B2Granted
Correlated electron resistive memory device and integration schemes
AssigneeGlobalfoundries Singapore Pte. Ltd.
InventorsCurtis Chun-I Hsieh, Wei-Hui Hsu, Wanbing Yi, Juan Boon Tan
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Abstract
A resistive memory device is provided. The resistive memory device comprises a first metal oxide layer above a body electrode. A correlated electron layer located between a source and a drain and above the first metal oxide layer. A gate above a bottom portion of the correlated electron layer.
Claims20
A resistive memory device comprising:
- a first metal oxide layer above a body electrode;
- a correlated electron layer located between a source and a drain and above the first metal oxide layer;
- and
- a gate above a bottom portion of the correlated electron layer.
1 more element
A resistive memory device comprising:
- a first metal oxide layer above a body electrode;
- a correlated electron layer having a bottom portion, wherein the bottom portion of the correlated electron layer is located at least partially between a source and a drain and above the first metal oxide layer;
- a gate above the bottom portion of the correlated electron layer;
- and
- the gate and the bottom portion of the correlated electron layer overlap the body electrode.
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A method of fabricating a resistive memory device, the method comprising:
- forming a body electrode and a first metal oxide layer above the body electrode;
- forming a source and a drain;
- forming a correlated electron layer above the first metal oxide layer and between the source and the drain;
- and
- forming a gate above a bottom portion of the correlated electron layer.
2 more elements
Dependencies are inferred from the claim text.