US 11,690,230 B2 · Non-volatile memory device and manufacturing method thereof

Abstract

Provided are a non-volatile memory device and a manufacturing method thereof. The non-volatile memory device includes a substrate having a memory region and a dummy region surrounding the memory region, an interconnect structure, memory cells, conductive vias and dummy vias. The interconnect structure is disposed on the substrate and in the memory region. The memory cells are disposed on the interconnect structure and arranged in an array when viewed from a top view. The memory cells include first memory cells in the memory region and second memory cells in the dummy region. The conductive vias are disposed in the memory region and between the first memory cells and the interconnection structure to electrically connect each of the first memory cells to the interconnect structure. The dummy vias are disposed in the dummy region and surround the memory region.

Claims18

Dependent claims

A non-volatile memory device, comprising:

a substrate, having a memory region and a dummy region surrounding the memory region;
an interconnect structure, disposed on the substrate and located in the memory region;
a plurality of memory cells, disposed on the interconnect structure and arranged in an array when viewed from a top view, wherein the plurality of memory cells comprises a plurality of first memory cells located in the memory region and a plurality of second memory cells located in the dummy region;
a plurality of conductive vias, disposed in the memory region and located between the plurality of first memory cells and the interconnect structure to electrically connect each of the first memory cells and the interconnect structure, respectively;
and
a plurality of dummy vias, disposed in the dummy region and surrounding the memory region,
wherein the aperture of the dummy vias is smaller than the aperture of the conductive vias.

4 more elements

A manufacturing method of a non-volatile memory device, comprising:

providing a substrate having a memory region and a dummy region surrounding the memory region;
forming an interconnect structure on the substrate, wherein the interconnect structure is located in the memory region;
forming a plurality of memory cells on the interconnect structure, wherein the plurality of memory cells are arranged in an array when viewed from a top view, and comprise a plurality of first memory cells located in the memory region and a plurality of second memory cells located in the dummy region;
forming a plurality of conductive vias in the memory region, wherein the plurality of conductive vias are located between the plurality of first memory cells and the interconnect structure to electrically connect each of the first memory cells and the interconnect structure, respectively;
and
forming a plurality of dummy vias in the dummy region, wherein the plurality of dummy vias surround the memory region,
wherein the aperture of the dummy via is smaller than the aperture of the conductive vias.

4 more elements

Dependencies are inferred from the claim text.

Non-volatile memory device and manufacturing method thereof

Life of this patent

Non-volatile memory device and manufacturing method thereof

Life of this patent

Abstract

Claims18