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US 11,690,219 B2Granted
Three-dimensional memory devices having through array contacts and methods for forming the same
AssigneeYangtze Memory Technologies Co., Ltd.
InventorsMei Lan Guo, Yushi Hu, Ji Xia, Hongbin Zhu
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Abstract
In certain aspects, a three-dimensional (3D) memory device includes a memory stack including interleaved conductive layers and dielectric layers, a channel structure extending through the memory stack, and a through array contact (TAC) extending through the memory stack. Edges of the conductive layers along a sidewall of the TAC are recessed. The TAC includes a conductor layer and a spacer over the sidewall of the TAC.
Claims20
A three-dimensional (3D) memory device, comprising:
- a memory stack comprising interleaved conductive layers and dielectric layers;
- a channel structure extending through the memory stack;
- and
- a through array contact (TAC) extending through the memory stack into a substrate,
- wherein:
- the TAC is in a core array region adjacent to a staircase region;
- edges of the conductive layers and edges of the dielectric layers along a sidewall of the TAC are aligned;
- and
- the TAC comprises a conductor layer and a spacer over the sidewall of the TAC, the conductor layer of the TAC being in direct contact with the substrate.
6 more elements
A three-dimensional memory device, comprising:
- a memory stack comprising interleaved conductive layers and dielectric layers;
- a channel structure extending through the memory stack;
- and
- a through array contact (TAC) extending through the memory stack and arranged in a core array region,
- wherein:
- edges of the conductive layers and edges of the dielectric layers along a sidewall of the TAC are aligned;
- and
- the TAC comprises a conductor layer and a spacer over the sidewall of the TAC and is configured to provide a vertical interconnect between the memory stack and a peripheral device outside the core array region.
5 more elements
Dependencies are inferred from the claim text.