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US 11,689,395 B2Granted
Efficient architecture for high-performance DSP-based SERDES
AssigneeAvago Technologies International Sales Pte. Limited
InventorsMagesh Valliappan, Adam Benjamin Healey
Life of this patent
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Abstract
A digital signal processing (DSP) device includes a first fitter to equalize channel dispersion associated with signal transmission through a medium, a second filter to cancel channel reflections, and a third filter to at least reduce noise. The DSP device is a receiver DSP of the SERDES.
Claims20
A digital signal processing (DSP) device comprising:
- a first filter configured to equalize channel dispersion associated with signal transmission;
- a second filter configured to cancel channel reflections;
- a receiver DSP comprising a serializer deserializer (SERDES);
- an analog-to-digital converter (ADC);
- and
- an ADC calibration circuit configured to calibrate for a gain error and a timing offset of the ADC and to provide an input signal for the first filter.
3 more elements
A system comprising:
- an analog-to-digital converter (ADC) configured to convert an analog signal from an analog front-end (AFE) circuit;
- a first equalizer configured to equalize channel dispersion of a transmission medium coupled to the AFE circuit;
- a reflection canceller configured to cancel channel reflections associated with the transmission medium;
- and
- a receive-(RX-) FFE coupled to a delay-match circuit,
- wherein:
- the AFE circuit is configured to receive analog signals transmitted by a serializer-deserializer (SERDES) transmitter through the transmission medium, and
- the RX-FFE and the delay-match circuit are implemented in parallel with the reflection canceller.
5 more elements
A serializer deserializer (SERDES) receiver comprising:
- a first feed-forward equalizer (FFE) configured to equalize channel dispersion associated with a transmission medium;
- a filter configured to reduce effects of a channel reflection associated with the transmission medium;
- a decision-feedback equalizer (DFE) configured to remove inter-symbol interference added by a receiver (RX)-FFE;
- a second FFE coupled to the filter, and
- an interpolator coupled to one of the first FFE or the second FFE, wherein the transmission medium comprises a SERDES transmission medium.
2 more elements
Dependencies are inferred from the claim text.