Back to results
US 11,689,217 B2Granted
Methods and systems of stall mitigation in iterative decoders
AssigneeMicron Technology, Inc.
InventorsMustafa N. Kaynak, Sivagnanam Parthasarathy
Life of this patent
Estimating the term…
Abstract
Methods, systems, and apparatuses for stall mitigation in iterative decoders are described. A codeword is received from a memory device. The codeword is iteratively error corrected based on a first bit flipping criterion. A stall condition in the multiple error correction iterations is detected. In response to the detection, the codeword is error corrected based on a second bit flipping criterion that is different from the first bit flipping criterion.
Claims20
A method comprising:
- receiving a codeword comprising a plurality of bits from a memory device;
- iteratively error correcting the codeword in a plurality of iterations based on a comparison between a first bit flipping criterion and an energy function of each of the plurality of bits of the codeword, wherein the first bit flipping criterion includes a first bit flipping threshold and wherein error correcting the codeword in an iteration of the plurality of iterations includes flipping one or more bits of the plurality of bits for the codeword that satisfy the first bit flipping threshold;
- detecting a stall condition in the plurality of iterations;
- and
- responsive to the detection, error correcting the codeword based on a comparison between a second bit flipping criterion and the energy function of each of the plurality of bits of the codeword, wherein the second bit flipping criterion includes a second bit flipping threshold and wherein the second bit flipping threshold is different from the first bit flipping threshold, wherein error correcting the codeword based on the second bit flipping threshold includes flipping one or more bits of the plurality of bits for the codeword that satisfy the second bit flipping threshold, wherein the second bit flipping threshold causes a bit to be flipped as a result of a comparison between the second bit flipping threshold and an energy function of the bit, wherein the bit was not flipped as a result of a comparison of the first bit flipping threshold and the energy function of the bit.
2 more elements
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:
- receive a codeword comprising a plurality of bits from a memory device;
- iteratively error correct the codeword in a plurality of iterations based on a comparison between a first bit flipping criterion and an energy function of each of the plurality of bits of the codeword, wherein the first bit flipping criterion includes a first bit flipping threshold and wherein error correcting the codeword in an iteration of the plurality of iterations includes flipping one or more bits of the plurality of bits for the codeword that satisfy the first bit flipping threshold;
- detect a stall condition in the plurality of iterations;
- and
- responsive to the detection, error correct the codeword based on a comparison between a second bit flipping criterion and the energy function of each of the plurality of bits of the codeword, wherein the second bit flipping criterion includes a second bit flipping threshold and wherein the second bit flipping threshold is different from the first bit flipping threshold, wherein error correcting the codeword based on the second bit flipping threshold includes flipping one or more bits of the plurality of bits for the codeword that satisfy the second bit flipping threshold, wherein the second bit flipping threshold causes a bit to be flipped as a result of a comparison between the second bit flipping threshold and an energy function of the bit, wherein the bit was not flipped as a result of a comparison of the first bit flipping threshold and the energy function of the bit.
2 more elements
A system comprising:
- a memory device;
- and
- a processing device, operatively coupled with the memory device, to:
- receive a codeword comprising a plurality of bits from the memory device;
- iteratively error correct the codeword in a plurality of iterations based on a comparison between a first bit flipping threshold and an energy function of each of the plurality of bits of the codeword, wherein the error correction of the codeword in an iteration from the plurality of iterations includes flipping one or more bits of the plurality of bits for the codeword that satisfy the first bit flipping threshold;
- detect a stall condition in the plurality of iterations;
- and
- responsive to the detection, error correct the codeword based on a comparison between a second bit flipping threshold and the energy function of each of the plurality of bits of the codeword, wherein the second bit flipping threshold is different from the first bit flipping threshold, wherein error correcting the codeword based on the second bit flipping threshold includes flipping one or more bits of the plurality of bits for the codeword that satisfy the second bit flipping threshold, wherein the second bit flipping threshold causes a bit to be flipped as a result of a comparison between the second bit flipping threshold and an energy function of the bit, wherein the bit was not flipped as a result of a comparison of the first bit flipping threshold and the energy function of the bit.
5 more elements
Dependencies are inferred from the claim text.