Integrated circuit and operation method thereof

An integrated circuit comprising:

• a receiver configured to sequentially receive a plurality of first data signals based on each of a plurality of transmitter preset settings through an external link, equalize and sample the first data signals, and output a plurality of second data signals;
• a receiver setting table including a plurality of combinations including values of a plurality of parameters related to the receiver;
• and
• a receiver control circuit configured to sequentially select the plurality of combinations with reference to the receiver setting table, set a plurality of parameters with the selected combinations, generate a phase code for checking eye opening specifications of the plurality of second data signals, and provide the phase code to the receiver,
• wherein the receiver control circuit is configured to change a value of the phase code, compare a first bit error rate according to the changed value of the phase code with a target bit error rate, and generate eye opening specifications of the plurality of second data signals based on a result of the comparison of the first bit error rate with the target bit error rate.

An operation method of an integrated circuit, the method comprising:

• receiving a first data signal based on an mth (where m is an integer greater than or equal to 1) transmitter preset setting among a plurality of transmitter preset settings through a receiver;
• sequentially selecting a plurality of combinations including values of a plurality of parameters related to the receiver and setting the plurality of parameters as the selected combinations;
• monitoring eye opening specifications of a plurality of second data signals based on a bit error rate, the second data signals generated based on the first data signal and a phase code;
• and
• selecting a combination mapped to the mth transmitter preset setting among the plurality of combinations based on a result of the monitoring.