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US 11,689,201 B2Granted
Universal serial bus (USB) host data switch with integrated equalizer
AssigneeQUALCOMM Incorporated
InventorsVijayakumar Dhanasekaran, Khaled Mahmoud Abdelfattah Aly
Life of this patent
Estimating the term…
Abstract
An aspect relates to an apparatus including a first pair of switching devices configured to selectively couple an application processor to a Universal Serial Bus (USB) differential data transmission lines; a USB host port connector coupled to the USB differential data transmission lines; a second pair of switching devices configured to selectively couple an audio circuit to the USB differential data transmission lines; and an equalizer including differential terminals coupled to the USB differential data transmission lines, respectively.
Claims21
An apparatus, comprising:
- a first pair of switching devices configured to selectively couple an application processor to Universal Serial Bus (USB) differential data transmission lines;
- a second pair of switching devices configured to selectively couple an audio circuit to the USB differential data transmission lines;
- and
- an equalizer including differential terminals coupled to the USB differential data transmission lines, respectively, wherein the equalizer comprises:
- a first current source;
- a first field effect transistor (FET) coupled in series with the first current source between a first voltage rail and a negative one of the USB differential data transmission lines, wherein the first FET includes a first gate coupled to a positive one of the USB differential data transmission lines;
- a second current source;
- a second FET coupled in series with the second current source between the first voltage rail and the positive one of the USB differential data transmission lines, wherein the second FET includes a second gate coupled to the negative one of the USB differential data transmission lines;
- and
- a capacitor coupled between a first node between the first current source and the first FET, and a second node between the second current source and the second FET.
7 more elements
An apparatus, comprising:
- a first pair of switching devices configured to selectively couple an application processor to Universal Serial Bus (USB) differential data transmission lines;
- a second pair of switching devices configured to selectively couple an audio circuit to the USB differential data transmission lines;
- and
- an equalizer including differential terminals coupled to the USB differential data transmission lines, respectively, wherein the equalizer comprises:
- a first resistor;
- a first field effect transistor (FET);
- a first current source coupled in series with the first resistor and the first FET between a first voltage rail and a second voltage rail;
- a second resistor;
- a second FET coupled in series with the second resistor and the first current source between the first and second voltage rails;
- a first capacitor coupled between a first node between the first resistor and the first FET, and a positive one of the USB differential data transmission lines;
- and
- a second capacitor coupled between a second node between the second resistor and the second FET, and a negative one of the USB differential data transmission lines.
9 more elements
A wireless communication device, comprising:
- at least one antenna;
- a transceiver coupled to the at least one antenna;
- one or more signal processing cores coupled to the transceiver;
- a Universal Serial Bus (USB) data switch coupled to the one or more signal processing cores, wherein the USB data switch comprises:
- a first pair of switching devices configured to selectively couple an application processor to USB differential data transmission lines;
- a second pair of switching devices configured to selectively couple an audio circuit to the USB differential data transmission lines;
- and
- an equalizer including differential terminals coupled to the USB differential data transmission lines, respectively, wherein the equalizer comprises:
- a first current source;
- a first field effect transistor (FET) coupled in series with the first current source between a first voltage rail and a negative one of the USB differential data transmission lines, wherein the first FET includes a first gate coupled to a positive one of the USB differential data transmission lines;
- a second current source;
- a second FET coupled in series with the second current source between the first voltage rail and the positive one of the USB differential data transmission lines, wherein the second FET includes a second gate coupled to the negative one of the USB differential data transmission lines;
- and
- a capacitor coupled between a first node between the first current source and the first FET, and a second node between the second current source and the second FET.
11 more elements
Dependencies are inferred from the claim text.