Semiconductor device having modified profile metal gate
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYu-Lien Huang, Chi-Wen Liu, Clement Hsingjen Wann, Ming-Huan Tsai, Zhao-Cheng Chen
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Abstract
A semiconductor device has a semiconductor substrate with a dielectric layer disposed thereon. A trench is defined in the dielectric layer. A metal gate structure is disposed in the trench. The metal gate structure includes a first layer and a second layer disposed on the first layer. The first layer extends to a first height in the trench and the second layer extends to a second height in the trench; the second height is less than the first height.
Claims20
A semiconductor device, comprising:
- a semiconductor substrate having a top surface;
- and
- a gate structure disposed over the semiconductor substrate, wherein the gate structure includes:
- a gate dielectric layer of a substantially U-shaped configuration and extending to a first height above the top surface, wherein the substantially U-shaped configuration has a bottom portion, a first side portion extending up from a first end of the bottom portion and a second side portion extending up from a second end of the bottom portion;
- a first metal layer directly on the gate dielectric layer, wherein the first metal layer interfaces a top surface of the bottom portion, a first portion of a sidewall of the first side portion, and a second portion of a sidewall of the second side portion;
- and
- a second metal layer over the first metal layer and extending to a second height above the top surface, wherein the second height is greater than the first height, and wherein the second metal layer interfaces a top surface of the first side portion and a top surface of the second side portion of the gate dielectric layer.
A semiconductor device comprising:
- a gate structure disposed on a semiconductor substrate, the gate structure having:
- a gate dielectric layer having a bottom portion and two side portions extending vertically above the bottom portion of the gate dielectric layer;
- a first metal layer directly on the gate dielectric layer and having a bottom portion and two side portions extending vertically above the bottom portion of the first metal layer;
- a second metal layer directly on the first metal layer and including a bottom portion and two side portions extending vertically above the bottom portion of the second metal layer;
- and
- a third metal layer directly on the second metal layer and interfacing a top surface of the two side portions of the gate dielectric layer.
A semiconductor device comprising:
- a gate structure disposed on a semiconductor substrate, the gate structure having:
- a gate dielectric layer having a U-shaped configuration, wherein the gate dielectric layer has an upper most surface at a first height from a top surface of the semiconductor substrate;
- a first metal-containing layer directly on the gate dielectric layer, wherein the first metal-containing layer has an uppermost surface at a second height from the top surface of the semiconductor substrate, wherein the second height is less than the first height;
- and
- a second metal-containing layer over the first metal-containing layer;
- and
- a dielectric layer abutting the gate dielectric layer and the second metal-containing layer, wherein the dielectric layer has a different composition than the gate dielectric layer.
Dependencies are inferred from the claim text.