Semiconductor arrangement and method for producing the same
AssigneeInfineon Technologies AG
InventorOlaf Hohlfeld
Life of this patent
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Abstract
A semiconductor arrangement includes a semiconductor substrate having a dielectric insulation layer and at least a first metallization layer arranged on a first side of the dielectric insulation layer. The first metallization layer includes at least two sections, each section being separated from a neighboring section by a recess. A semiconductor body is arranged on one of the sections of the first metallization layer. At least one indentation is arranged between a first side of the semiconductor body and a closest edge of the respective section of the first metallization layer. A distance between the first side and the closest edge of the section of the first metallization layer is between 0.5 mm and 5 mm.
Claims13
A semiconductor arrangement, comprising:
- a semiconductor substrate comprising a dielectric insulation layer and a first metallization layer arranged on a first side of the dielectric insulation layer, the first metallization layer comprising at least two sections, each section being separated from a neighboring section by a recess;
- a semiconductor body arranged on one of the sections of the first metallization layer;
- and
- at least one indentation arranged between a first side of the semiconductor body and a closest edge of the respective section of the first metallization layer,
- wherein a distance between the first side and the closest edge of the section of the first metallization layer is between 0.5 mm and 5 mm,
- wherein the at least one indentation is indented with respect to a furthest edge of the semiconductor body in a second direction such that no indentation extends beyond the furthest edge of the semiconductor body in the second direction.
Dependencies are inferred from the claim text.