Merged power pad for improving integrated circuit power delivery

A method for creating an integrated circuit package, comprising:

• forming a die on a wafer, the die includes a plurality of pads formed on the die and exposed on a top surface of the die;
• forming at least one post on the die, wherein the at least one post is formed to span at least two of the plurality of pads on the die utilized for power distribution;
• and
• connecting, via the at least one post, the die to a substrate including one or more redistribution layers (RDLs).

A method for assembling an integrated circuit (IC) package, comprising:

• forming a substrate on a carrier;
• forming a plurality of first posts on the substrate;
• form a die on a wafer, the die includes a plurality of pads formed on the die;
• forming a plurality of second posts on the die, a least one post the plurality of second posts constructed to span at least two of the plurality of pads on the die and associated with a common node utilized for power distribution;
• and
• connecting, via the at least one post of the plurality of second posts, the die to the substrate including one or more redistribution layers (RDLs).