Defect detection in memories with time-varying bit error rate

A method comprising:

• determining that a bit error rate (BER) condition corresponding to a read operation to read a unit of data in a memory component satisfies a threshold criterion;
• determining a write-to-read (W2R) delay for the read operation, wherein the W2R delay comprises a difference between a time of the read operation and a write timestamp indicating when the unit of data was written to the memory component;
• determining whether the W2R delay is within a W2R delay range corresponding to an initial read voltage level used by the read operation to read the unit of data;
• and
• initiating a defect detection operation responsive to the W2R delay being within the W2R delay range, the defect detection operation to detect time-varying defects in the memory component.

A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

• determining that a bit error rate (BER) condition corresponding to a read operation to read a unit of data in a memory component satisfies a threshold criterion;
• determining a write-to-read (W2R) delay for the read operation, wherein the W2R delay comprises a difference between a time of the read operation and a write timestamp indicating when the unit of data was written to the memory component;
• determining whether the W2R delay is within a W2R delay range corresponding to an initial read voltage level used by the read operation to read the unit of data;
• and
• initiating a defect detection operation responsive to the W2R delay being within the W2R delay range, the defect detection operation to detect time-varying defects in the memory component.