Memory system having memory controller

A memory system comprising:

• a memory device including a first memory cell connected to a first bit line and a first word line, a second memory cell connected to a second bit line adjacent to the first bit line and the first word line, a third memory cell connected to the first bit line and a second word line adjacent to the first word line, and a fourth memory cell connected to the second bit line and the second word line;
• and
• a memory controller configured to transmit data sets including index data to the memory device in a program operation,
• wherein the memory controller is further configured to generate the data sets such that the index data are stored in the first to fourth memory cells.

A memory system comprising:

• a memory block including a plurality of pages, wherein each of the plurality of pages comprises a plurality of memory cells connected to bit lines and a word line of word lines;
• a peripheral circuit configured to program index data and user data in corresponding pages from among the plurality of pages;
• and
• a memory controller configured to generate the index data according to a state of the user data, and transmit the user data and the index data to the peripheral circuit,
• wherein the corresponding pages include a first page and a second page adjacent to each other, and
• wherein a bit line, connected to a memory cell of the first page storing first index data corresponding to the first page, is different from a bit line, connected to a memory cell of the second page storing second index data corresponding to the second page.