Three-dimensional flash memory with back gate

A three-dimensional flash memory comprising:

• a plurality of word lines extended and formed in a horizontal direction on a substrate so as to be sequentially stacked;
• and
• a plurality of strings penetrating the plurality of word lines and extended and formed in one direction on the substrate, wherein each of the plurality of strings includes:
• a channel layer extended and formed in the one direction;
• and
• a charge storage layer extended and formed in the one direction to surround the channel layer, the channel layer and the charge storage layer constituting a plurality of memory cells corresponding to the plurality of word lines;
• wherein the channel layer includes:
• a back gate extended and formed in the one direction, with at least a portion of the back gate surrounded by the channel layer;
• and
• an insulating layer extended and formed in the one direction between the back gate and the channel layer, and
• wherein a region of the insulating layer, which corresponds to a ground selection line (GSL) located under the plurality of word lines, or a region of the channel layer, which corresponds to the GSL, has a structure for preventing a leakage current at the GSL.

A three-dimensional flash memory comprising:

• a plurality of word lines extended and formed in a horizontal direction on a substrate so as to be sequentially stacked;
• and
• a plurality of strings penetrating the plurality of word lines and extended and formed in one direction on the substrate, wherein each of the plurality of strings includes:
• a channel layer extended and formed in the one direction;
• and
• a charge storage layer extended and formed in the one direction to surround the channel layer, the channel layer and the charge storage layer constituting a plurality of memory cells corresponding to the plurality of word lines;
• wherein the channel layer includes:
• a back gate extended and formed in the one direction, with at least a portion of the back gate surrounded by the channel layer;
• and
• an insulating layer extended and formed in the one direction between the back gate and the channel layer, and
• wherein the channel layer has a structure of being segmented by the back gate.

A method for manufacturing a three-dimensional flash memory, the method comprising:

• preparing a semiconductor structure including a plurality of word lines extended and formed in a horizontal direction on a substrate so as to be sequentially stacked;
• a plurality of insulating layers alternately stacked between the plurality of word lines;
• and a plurality of strings penetrating the plurality of word lines and extended and formed in one direction on the substrate,
• wherein each of the plurality of strings includes:
• a channel layer extended and formed in the one direction;
• and
• a charge storage layer extended and formed in the one direction to surround the channel layer;
• and
• wherein a hole is extended and formed at the channel layer in the one direction in the semiconductor structure;
• extending and forming an insulating layer including an inner hole within the hole in the one direction;
• extending and forming the back gate formed of a conductive material in the inner hole of the insulating layer in the one direction;
• forming a wire for a voltage to be applied to the back gate at a partial region, which corresponds to the back gate, of an upper surface of each of the plurality of strings;
• and
• forming a bit line of each of the plurality of strings at a partial region, which corresponds to the channel layer, of the upper surface of each of the plurality of strings.