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US 11,688,453 B2Granted
Memory device, memory system and operating method
AssigneeSamsung Electronics Co., Ltd.
InventorsTaek Woon Kim, Jang Seok Choi
Life of this patent
Estimating the term…
Abstract
A method of operating a memory device includes; receiving a refresh command, performing a refresh operation on a target row of a bank memory array, and providing status information to a memory controller for an adjacent row, relative to the target row, during a refresh operation period defining a refresh operation performed by the memory device.
Claims20
A memory device comprising:
- a bank memory array including memory cells;
- a control unit configured to indicate a target row of the bank memory array in response to a refresh command received from an external source;
- a refresh control circuit that provides a refresh row address in response to the control unit indicating the target row;
- a row decoder that applies a refresh drive voltage to the refresh row address;
- a status monitor that monitors row-specific status information for memory cells of the target row;
- a status register that stores the status information under control of the status monitor;
- and
- a data input/output (I/O) buffer that receives the status information from the status register and provides the status information to the external source in response to the refresh command.
5 more elements
A memory system including a memory controller issuing a first refresh command and a memory device, wherein the memory devices comprises:
- a bank memory array including memory cells;
- a control unit configured to indicate a target row of the bank memory array in response to the first refresh command;
- a refresh control circuit that provides a refresh row address in response to the control unit indicating the target row;
- a row decoder that applies a refresh drive voltage to the refresh row address;
- a status monitor that monitors row-specific status information for memory cells of the target row;
- a status register that stores the status information under control of the status monitor;
- and
- a data input/output (I/O) buffer that receives the status information from the status register and provides the status information to the memory controller in response to the first refresh command, wherein the status information includes at least one of a row hammer level and a bit error level.
5 more elements
A method of operating a memory device, the method comprising:
- receiving a refresh command;
- performing a refresh operation on a target row of a bank memory array;
- and
- providing status information to a memory controller for an adjacent row, relative to the target row, during a refresh operation period defining a refresh operation performed by the memory device;
- wherein the status information includes a row hammer level and a bit error level.
2 more elements
Dependencies are inferred from the claim text.