Valley spin hall effect based non-volatile memory

An array of memory cells, comprising:

• a plurality of memory cells dispersed in one or more rows and one or more columns, each comprising:
• a first electrode coupled to the semiconductor layer,
• a second electrode coupled to the semiconductor layer, wherein the first and second electrodes are separated from one another along a first axis and wherein the semiconductor layer extends beyond the first axis along a second axis substantially perpendicular to the first axis, thereby forming a first wing,
• a third electrode separated from the semiconductor layer by an insulating layer;
• a first magnetic tunnel junction (MTJ) disposed on the first wing, and
• a first read electrode coupled to the first MTJ;
• a wordline (WL) for each row of the one or more rows coupled to the third electrodes of each of the associated memory cells in the associated row;
• a bit line (BL) for each column of the one or more columns coupled to the first electrodes of each of the associated memory cells in the associated column;
• a bit line bar (BLB) for each column of the one or more columns coupled to the second electrodes of each of the associated memory cells in the associated column;
• and
• a select line (SL) for each column of the one or more columns coupled to the first read electrodes of each of the associated memory cells in the associated column,
• wherein by selectively activating the WL, BL, BLB, and SL, each of the memory cells is accessed for writing or reading i) one memory cell at a time, ii) a row of memory cells at a time, iii) column of memory cells at a time, or iv) the array at a time.