Shift register unit and driving method, gate driving circuit, and display device

A shift register unit, comprising an input terminal, a first shift register sub-unit, and a second shift register sub-unit;

• wherein the first shift register sub-unit comprises a first output terminal and is connected to the input terminal to receive an input signal, and the first shift register sub-unit is configured to output a first output signal at the first output terminal according to the input signal;
• the second shift register sub-unit comprises a second output terminal and is connected to the input terminal to receive the input signal, and the second shift register sub-unit is configured to output a second output signal at the second output terminal according to the input signal,
• wherein the first shift register sub-unit comprises a first input circuit and a first output circuit,
• the first input circuit is connected to the input terminal and a first node, and is configured to input the input signal to the first node in response to a first clock signal;
• and
• the first output circuit is connected to the first node and the first output terminal, and is configured to output the first output signal to the first output terminal under control of a level of the first node,
• wherein the first output signal has a first voltage, and the second output signal has a second voltage, and in an output phase, the first voltage is less than the second voltage.