Pattern inspection apparatus and pattern inspection method

A pattern inspection method comprising:

• acquiring an optical image of each of a plurality of regions on a substrate to be inspected on which a pattern is formed;
• performing comparison processing of comparing the optical image with a reference image corresponding to the optical image using each of a plurality of comparison circuits, and outputting each of comparison results;
• determining, based on the comparison results generated in the plurality of comparison circuits, whether there is a region having an inspection abnormality in the plurality of regions;
• diagnosing whether a comparison circuit that performed comparison processing for the region determined to have the inspection abnormality in the plurality of regions has a malfunction;
• and
• excluding a comparison circuit diagnosed as a malfunction in the plurality of comparison circuits from a target to which a region is assigned, and assigning regions where comparison processing has not yet been performed in the plurality of regions to comparison circuits that are not diagnosed as malfunctions.

A pattern inspection apparatus comprising:

• an optical image acquisition mechanism configured to acquire an optical image of each of a plurality of regions on a substrate to be inspected on which a pattern is formed;
• a plurality of comparison circuits each of which configured to include a plurality of sub comparison circuits that individually perform comparison processing of comparing the optical image with a reference image corresponding to the optical image;
• an abnormality determination circuit configured to determine, based on comparison results generated in the plurality of sub comparison circuits, whether there is a region having an inspection abnormality in the plurality of regions;
• a malfunction diagnosis circuit configured to diagnose whether a sub comparison circuit that performed comparison processing for the region determined to have the inspection abnormality in the plurality of regions has a malfunction;
• and
• an assignment processing circuit configured to individually assign regions of the plurality of regions, where comparison processing is to be performed, to sub comparison circuits that are not diagnosed as malfunctions in the plurality of sub comparison circuits including a sub comparison circuit diagnosed as a malfunction, and to exclude the sub comparison circuit diagnosed as the malfunction from a target to which a region is assigned.