Shadow feature-based determination of capacitance values for integrated circuit (IC) layouts

A method comprising:

• by a computing system:
• accessing a set of integrated circuit (IC) layouts and capacitance values determined for components of the set of IC layouts;
• constructing shadow feature training data for the set of IC layouts, including by, for a given component of an IC layout in the set of IC layouts:
• extracting a shadow feature for the given component, wherein the shadow feature comprises a unitless, scalar value computed as a function of space areas and distances between the given component to unobstructed portions of surrounding components of the IC layout, wherein the unobstructed portions are not blocked along a linear view to the given component by any other component of the IC layout;
• and
• combining the shadow feature and a capacitance value for the given component into a shadow feature training data sample of the shadow feature training data;
• training a machine-learning (ML) model with the shadow feature training data;
• accessing an input IC layout;
• and
• extracting shadow features for components of the input IC layout;
• providing the extracted shadow features for the components of the input IC layout to the trained ML model;
• and
• determining capacitance values for the input IC layout via the trained ML model.