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US 11,687,464 B2Granted
Address translation in a data processing apparatus
AssigneeArm Limited
InventorsGraeme Peter Barnes, Catalin Theodor Marinas, William James Deacon
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Abstract
An apparatus comprises address translation circuitry (70) to perform a translation of a virtual address (80) comprising a virtual tag portion (88) and a virtual address portion (86) into a physical address (82) comprising a physical tag portion (92) and a physical address portion (90). The address translation circuitry comprises address tag translation circuitry (72) to perform a translation of the virtual tag portion into the physical tag portion and the address translation to be performed is selected in dependence on the virtual address.
Claims16
An apparatus comprising:
- address translation circuitry configured to perform a translation of a virtual address comprising a virtual tag portion and a virtual address portion into a physical address comprising a physical tag portion and a physical address portion, the physical address portion identifying a memory location to which access is required and the physical tag portion indicating whether to perform a predetermined memory operation, and the address translation circuitry comprising:
- address tag translation circuitry configured to perform a translation of the virtual tag portion into the physical tag portion,
- wherein the address translation circuitry is configured to select the translation to be performed by the address tag translation circuitry in dependence on the virtual address portion, and
- wherein the virtual tag portion and the virtual address portion are non-overlapping portions of the virtual address, and the physical tag portion and the physical address portion are non-overlapping portions of the physical address;
- and
- a memory system configured to receive the physical address and to access the memory location identified by the physical address portion, wherein the memory system is responsive to reception of the physical address, when a predetermined part of the physical tag portion has a predetermined value, to perform the predetermined memory operation,
- wherein the predetermined memory operation is a guard tag comparison of the physical tag portion against a guard tag value associated with the memory location and the memory system is responsive to the physical tag portion and the guard tag value not satisfying a match condition to indicate a fault condition.
4 more elements
A method comprising:
- selecting a translation to be performed on a virtual address comprising a virtual tag portion and a virtual address portion into a physical address comprising a physical tag portion and a physical address portion, wherein the selecting of the translation is dependent on the virtual address portion, the physical address portion identifying a memory location to which access is required and the physical tag portion indicating whether to perform a predetermined memory operation;
- and
- performing the translation to translate the virtual tag portion into the physical tag portion,
- wherein the virtual tag portion and the virtual address portion are non-overlapping portions of the virtual address, and the physical tag portion and the physical address portion are non-overlapping portions of the physical address;
- and
- receiving the physical address and accessing the memory location identified by the physical address portion, and in response to reception of the physical address and a predetermined part of the physical tag portion having a predetermined value, performing the predetermined memory operation,
- wherein the predetermined memory operation is a guard tag comparison of the physical tag portion against a guard tag value associated with the memory location and the memory system is responsive to the physical tag portion and the guard tag value not satisfying a match condition to indicate a fault condition.
4 more elements
A non-transitory, computer-readable storage device storing a computer program for controlling a host data processing apparatus to provide an instruction execution environment for execution of instructions of target program code, comprising:
- address translation program logic configured to perform a translation of a virtual address comprising a virtual tag portion and a virtual address portion into a physical address comprising a physical tag portion and a physical address portion, the physical address portion identifying a memory location to which access is required and the physical tag portion indicating whether to perform a predetermined memory operation, and the address translation program logic comprising:
- address tag translation program logic configured to perform a translation of the virtual tag portion into the physical tag portion,
- wherein the address translation program logic is configured to select the translation to be performed by the address tag translation circuitry in dependence on the virtual address portion, and
- wherein the virtual tag portion and the virtual address portion are non-overlapping portions of the virtual address, and the physical tag portion and the physical address portion are non-overlapping portions of the physical address;
- and
- memory system program logic configured to receive the physical address and to access the memory location identified by the physical address portion, wherein the memory system program logic is responsive to reception of the physical address, when a predetermined part of the physical tag portion has a predetermined value, to perform the predetermined memory operation,
- wherein the predetermined memory operation is a guard tag comparison of the physical tag portion against a guard tag value associated with the memory location and the memory system is responsive to the physical tag portion and the guard tag value not satisfying a match condition to indicate a fault condition.
4 more elements
Dependencies are inferred from the claim text.